Assignee
INTEGRATED SILICON SOLUTION INC
US·31 granted patents·7 pending applications·121 citations·filing 2014–2025
Top patents by PatentIndex Score
38 records- 0191US9780785B2Calibration circuit for on-chip drive and on-die terminationINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Oct 3, 2017·7 cites·26 claims
- 0291US9543016B1Low power high speed program method for multi-time programmable memory deviceINTEGRATED SILICON SOLUTION INC·Filed 2015·Granted Jan 10, 2017·9 cites·15 claims
- 0390US9880901B2Serial bus DRAM error correction event notificationINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Jan 30, 2018·13 cites·22 claims
- 0487US9496046B1High speed sequential read method for flash memoryINTEGRATED SILICON SOLUTION INC·Filed 2015·Granted Nov 15, 2016·10 cites·15 claims
- 0586US10236042B2Clocked commands timing adjustments method in synchronous semiconductor integrated circuitsINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Mar 19, 2019·6 cites·16 claims
- 0686US10068626B2Clocked commands timing adjustments in synchronous semiconductor integrated circuitsINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Sep 4, 2018·9 cites·18 claims
- 0785US9717123B1Audible noise reduction method for multiple LED channel systemsINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Jul 25, 2017·44 cites·18 claims
- 0882US11612965B2Method of forming package structureINTEGRATED SILICON SOLUTION INC·Filed 2020·Granted Mar 28, 2023·2 cites·9 claims
- 0982US10229743B1Memory device read training methodINTEGRATED SILICON SOLUTION INC·Filed 2017·Granted Mar 12, 2019·10 cites·13 claims
- 1081US10103731B2Calibration circuit for on-chip drive and on-die terminationINTEGRATED SILICON SOLUTION INC·Filed 2017·Granted Oct 16, 2018·3 cites·18 claims
- 1175US9529667B2DRAM error correction event notificationINTEGRATED SILICON SOLUTION INC·Filed 2014·Granted Dec 27, 2016·5 cites·18 claims
- 1267US10331575B2Secured chip enable with chip disableINTEGRATED SILICON SOLUTION INC·Filed 2017·Granted Jun 25, 2019·1 cites·17 claims
- 1366US11951571B2Method of forming package structureINTEGRATED SILICON SOLUTION INC·Filed 2023·Granted Apr 9, 2024·0 cites·6 claims
- 1465US11616145B2FINFET stack gate memory and method of forming thereofINTEGRATED SILICON SOLUTION INC·Filed 2021·Granted Mar 28, 2023·0 cites·9 claims
- 1561US9904596B2Serial bus event notification in a memory deviceINTEGRATED SILICON SOLUTION INC·Filed 2017·Granted Feb 27, 2018·2 cites·15 claims
- 1659US12021059B2Wafer-bonding structure and method of forming thereofINTEGRATED SILICON SOLUTION INC·Filed 2021·Granted Jun 25, 2024·0 cites·5 claims
- 1759US2021143275A1Finfet stack gate memory and mehod of forming thereofINTEGRATED SILICON SOLUTION INC·Filed 2020·Application pending·0 cites
- 1858US2025266328A1Package structureINTEGRATED SILICON SOLUTION INC·Filed 2025·Application pending·0 cites
- 1956US12119041B2Signal synchronization adjustment method and signal synchronization adjustment circuitINTEGRATED SILICON SOLUTION INC·Filed 2023·Granted Oct 15, 2024·0 cites·10 claims
- 2055US12237669B2Semiconductor integrated circuitINTEGRATED SILICON SOLUTION INC·Filed 2023·Granted Feb 25, 2025·0 cites·9 claims
- 2153US10832747B2Clocked commands timing adjustments method in synchronous semiconductor integrated circuitsINTEGRATED SILICON SOLUTION INC·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 2252US2021296281A1Wafer-bonding structure and method of forming thereofINTEGRATED SILICON SOLUTION INC·Filed 2020·Application pending·0 cites
- 2350US2022246501A1Package structureINTEGRATED SILICON SOLUTION INC·Filed 2022·Application pending·0 cites
- 2448US9672923B1Low power high speed program method for multi-time programmable memory deviceINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Jun 6, 2017·0 cites·15 claims
- 2547US12260930B2Memory core characteristic screening method and system thereofINTEGRATED SILICON SOLUTION INC·Filed 2022·Granted Mar 25, 2025·0 cites·20 claims
- 2647US12183411B2Memory interface circuitry and built-in self-testing methodINTEGRATED SILICON SOLUTION INC·Filed 2023·Granted Dec 31, 2024·0 cites·16 claims
- 2743US9967932B1Power supply transient reduction method for multiple LED channel systemsINTEGRATED SILICON SOLUTION INC·Filed 2017·Granted May 8, 2018·0 cites·20 claims
- 2842US9514806B2Auto low current programming method without verifyINTEGRATED SILICON SOLUTION INC·Filed 2015·Granted Dec 6, 2016·0 cites·11 claims
- 2941US12266418B2Memory device having row driver circuits for reducing leakage currents during power offINTEGRATED SILICON SOLUTION INC·Filed 2022·Granted Apr 1, 2025·0 cites·8 claims
- 3041US11841722B2Controlling circuit for low-power low dropout regulator and controlling method thereofINTEGRATED SILICON SOLUTION INC·Filed 2022·Granted Dec 12, 2023·0 cites·20 claims
- 3140US9496030B2Resistive memory device implementing selective memory cell refreshINTEGRATED SILICON SOLUTION INC·Filed 2016·Granted Nov 15, 2016·0 cites·8 claims
- 3239US2021208689A1Proximity detection method and proximity detection keyboardINTEGRATED SILICON SOLUTION INC·Filed 2020·Application pending·0 cites
- 3337US11378620B2Method and system for detecting abnormal dieINTEGRATED SILICON SOLUTION INC·Filed 2020·Granted Jul 5, 2022·0 cites·8 claims
- 3437US11115006B1Internal latch circuit and method for generating latch signal thereofINTEGRATED SILICON SOLUTION INC·Filed 2020·Granted Sep 7, 2021·0 cites·10 claims
- 3536US11195592B2Memory inspecting method and memory inspecting systemINTEGRATED SILICON SOLUTION INC·Filed 2020·Granted Dec 7, 2021·0 cites·5 claims
- 3635US2021305136A1Package structureINTEGRATED SILICON SOLUTION INC·Filed 2020·Application pending·0 cites
- 3733US11894043B2Power management circuit in low-power double data rate memory and management method thereofINTEGRATED SILICON SOLUTION INC·Filed 2022·Granted Feb 6, 2024·0 cites·20 claims
- 3829US2017103813A1Effective programming method for non-volatile flash memory using junction band to band hot electronINTEGRATED SILICON SOLUTION INC·Filed 2015·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →