Individual holder
JEDDELOH JOSEPH M
US·24 granted patents·1 pending application·127 citations·filing 2005–2012
Individually held — no corporate assignee on record.
Top patents by PatentIndex Score
25 records- 0194US8289760B2Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modesJEDDELOH JOSEPH M·Filed 2008·Granted Oct 16, 2012·25 cites·19 claims
- 0291US8495338B2Transaction log recoveryJEDDELOH JOSEPH M·Filed 2010·Granted Jul 23, 2013·13 cites·34 claims
- 0390US8266501B2Stripe based memory operationJEDDELOH JOSEPH M·Filed 2009·Granted Sep 11, 2012·16 cites·55 claims
- 0488US9659630B2Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modesJEDDELOH JOSEPH M·Filed 2012·Granted May 23, 2017·8 cites·26 claims
- 0588US8554983B2Devices and methods for operating a solid state driveJEDDELOH JOSEPH M·Filed 2008·Granted Oct 8, 2013·13 cites·29 claims
- 0688US8086815B2System for controlling memory accesses to memory modules having a memory hub architectureJEDDELOH JOSEPH M·Filed 2011·Granted Dec 27, 2011·7 cites·10 claims
- 0787US8938630B2Apparatus power controlJEDDELOH JOSEPH M·Filed 2012·Granted Jan 20, 2015·7 cites·30 claims
- 0884US8639902B2Methods for sequencing memory access requestsJEDDELOH JOSEPH M·Filed 2009·Granted Jan 28, 2014·9 cites·23 claims
- 0981US8448018B2Stripe-based memory operationJEDDELOH JOSEPH M·Filed 2012·Granted May 21, 2013·4 cites·20 claims
- 1079US8234479B2System for controlling memory accesses to memory modules having a memory hub architectureJEDDELOH JOSEPH M·Filed 2011·Granted Jul 31, 2012·3 cites·13 claims
- 1178US8082404B2Memory arbitration system and method having an arbitration packet protocolJEDDELOH JOSEPH M·Filed 2008·Granted Dec 20, 2011·5 cites·22 claims
- 1275US8504782B2Buffer control system and method for a memory system having outstanding read and write request buffersJEDDELOH JOSEPH M·Filed 2007·Granted Aug 6, 2013·5 cites·21 claims
- 1374US8990476B2Power interrupt managementJEDDELOH JOSEPH M·Filed 2009·Granted Mar 24, 2015·4 cites·32 claims
- 1471US8392686B2System and method for read synchronization of memory modulesJEDDELOH JOSEPH M·Filed 2008·Granted Mar 5, 2013·3 cites·13 claims
- 1571US8117371B2System and method for memory hub-based expansion busJEDDELOH JOSEPH M·Filed 2011·Granted Feb 14, 2012·1 cites·24 claims
- 1669US9082461B2Multiple processor system and method including multiple memory hub modulesJEDDELOH JOSEPH M·Filed 2012·Granted Jul 14, 2015·1 cites·11 claims
- 1768US8195918B2Memory hub with internal cache and/or memory access predictionJEDDELOH JOSEPH M·Filed 2011·Granted Jun 5, 2012·1 cites·6 claims
- 1863US8954687B2Memory hub and access method having a sequencer and internal row cachingJEDDELOH JOSEPH M·Filed 2005·Granted Feb 10, 2015·2 cites·25 claims
- 1955US8499127B2Memory hub with internal cache and/or memory access predictionJEDDELOH JOSEPH M·Filed 2012·Granted Jul 30, 2013·0 cites·6 claims
- 2054US8555006B2Memory arbitration system and method having an arbitration packet protocolJEDDELOH JOSEPH M·Filed 2011·Granted Oct 8, 2013·0 cites·8 claims
- 2153US8244952B2Multiple processor system and method including multiple memory hub modulesJEDDELOH JOSEPH M·Filed 2011·Granted Aug 14, 2012·0 cites·8 claims
- 2253US8209445B2Apparatus and method for direct memory access in a hub-based memory systemJEDDELOH JOSEPH M·Filed 2011·Granted Jun 26, 2012·0 cites·11 claims
- 2352US8510480B2Memory system and method having uni-directional data busesJEDDELOH JOSEPH M·Filed 2006·Granted Aug 13, 2013·0 cites·25 claims
- 2442US8799726B2Method and apparatus for testing high capacity/high bandwidth memory devicesJEDDELOH JOSEPH M·Filed 2011·Granted Aug 5, 2014·0 cites·19 claims
- 2539US2006156092A1Memory technology test apparatusJEDDELOH JOSEPH M·Filed 2006·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →