Assignee
LIN JING-CHENG
TW30 patents
Top patents by PatentIndex Score
US9443783B2Sep 13, 2016
3DIC stacking device and method of manufacture
LIN JING-CHENG891 citations99
US8703542B2Apr 22, 2014
Wafer-level packaging mechanisms
LIN JING-CHENG584 citations99
US9000584B2Apr 7, 2015
Packaged semiconductor device with a molding compound and a method of forming the same
LIN JING-CHENG1,021 citations98
US8779599B2Jul 15, 2014
Packages including active dies and dummy dies and methods for forming the same
LIN JING-CHENG48 citations98
US8643148B2Feb 4, 2014
Chip-on-Wafer structures and methods for forming the same
LIN JING-CHENG116 citations98
US8592995B2Nov 26, 2013
Method and structure for adhesion of intermetallic compound (IMC) on Cu pillar bump
LIN JING-CHENG34 citations93
US8338939B2Dec 25, 2012
TSV formation processes using TSV-last approach
LIN JING-CHENG22 citations93
US8247285B2Aug 21, 2012
N-FET with a highly doped source/drain and strain booster
LIN JING-CHENG20 citations93
US9293366B2Mar 22, 2016
Through-substrate vias with improved connections
LIN JING-CHENG4 citations84
US9245773B2Jan 26, 2016
Semiconductor device packaging methods and structures thereof
LIN JING-CHENG6 citations84
US9219016B2Dec 22, 2015
Structure design for 3DIC testing
LIN JING-CHENG14 citations84
US8970035B2Mar 3, 2015
Bump structures for semiconductor package
LIN JING-CHENG9 citations84
US8963334B2Feb 24, 2015
Die-to-die gap control for semiconductor structure and method
LIN JING-CHENG6 citations84
US8872326B2Oct 28, 2014
Three dimensional (3D) fan-out packaging mechanisms
LIN JING-CHENG6 citations84
US8124513B2Feb 28, 2012
Germanium field effect transistors and fabrication thereof
LIN JING-CHENG7 citations84
US8922004B2Dec 30, 2014
Copper bump structures having sidewall protection layers
LIN JING-CHENG9 citations83
US8828848B2Sep 9, 2014
Die structure and method of fabrication thereof
LIN JING-CHENG10 citations83
US8338884B2Dec 25, 2012
Selective epitaxial growth of semiconductor materials with reduced defects
LIN JING-CHENG5 citations74
US9679783B2Jun 13, 2017
Molding wafer chamber
LIN JING-CHENG4 citations73
US9646942B2May 9, 2017
Mechanisms for controlling bump height variation
LIN JING-CHENG3 citations73
US9418876B2Aug 16, 2016
Method of three dimensional integrated circuit assembly
LIN JING-CHENG4 citations73
US9006004B2Apr 14, 2015
Probing chips during package formation
LIN JING-CHENG4 citations73
US8975183B2Mar 10, 2015
Process for forming semiconductor structure
LIN JING-CHENG2 citations63
US8698308B2Apr 15, 2014
Bump structural designs to minimize package defects
LIN JING-CHENG3 citations63
US8653658B2Feb 18, 2014
Planarized bumps for underfill control
LIN JING-CHENG2 citations63
US8540506B2Sep 24, 2013
Semiconductor molding chamber
LIN JING-CHENG2 citations63
US8395215B2Mar 12, 2013
Germanium field effect transistors and fabrication thereof
LIN JING-CHENG4 citations63
US9117682B2Aug 25, 2015
Methods of packaging semiconductor devices and structures thereof
LIN JING-CHENG1 citations61
US8569086B2Oct 29, 2013
Semiconductor device and method of dicing semiconductor devices
LIN JING-CHENG1 citations52
US8395221B2Mar 12, 2013
Depletion-free MOS using atomic-layer doping
LIN JING-CHENG0 citations52