Assignee
LIN SHIAN-JYH
TW·4 granted patents·9 pending applications·35 citations·filing 2004–2012
Top patents by PatentIndex Score
13 records- 0194US8202801B1Method of fabricating a semiconductor device with through substrate viaLIN SHIAN-JYH·Filed 2012·Granted Jun 19, 2012·17 cites·9 claims
- 0287US8143121B2DRAM cell with double-gate fin-FET, DRAM cell array and fabrication method thereofLIN SHIAN-JYH·Filed 2009·Granted Mar 27, 2012·12 cites·27 claims
- 0383US8148824B2Semiconductor device with through substrate viaLIN SHIAN-JYH·Filed 2010·Granted Apr 3, 2012·6 cites·7 claims
- 0447US9024377B2Semiconductor device capable of reducing influences of adjacent word lines or adjacent transistors and fabricating method thereofLIN SHIAN-JYH·Filed 2011·Granted May 5, 2015·0 cites·11 claims
- 0546US2013299884A1Memory device and method for manufacturing memory deviceLIN SHIAN JYH·Filed 2012·Application pending·0 cites
- 0646US2014070359A1Semiconductor memory array structureLIN SHIAN-JYH·Filed 2012·Application pending·0 cites
- 0745US2009047766A1Method for fabricating recess channel mos transistor deviceLIN SHIAN-JYH·Filed 2008·Application pending·0 cites
- 0842US2009104748A1Method for fabricating self-aligned recess gate trenchLIN SHIAN-JYH·Filed 2008·Application pending·0 cites
- 0939US2007218612A1Method for fabricating a recessed-gate mos transistor deviceLIN SHIAN-JYH·Filed 2006·Application pending·0 cites
- 1039US2005208775A1Method for growing a gate oxide layer on a silicon surface with preliminary n2o annealLIN SHIAN-JYH·Filed 2004·Application pending·0 cites
- 1138US2014036565A1Memory device and method of manufacturing memory structureLIN SHIAN JYH·Filed 2012·Application pending·0 cites
- 1237US2008318388A1Method for fabricating mos transistor with recess channelLIN SHIAN-JYH·Filed 2007·Application pending·0 cites
- 1336US2011260297A1Through-substrate via and fabrication method thereofLIN SHIAN-JYH·Filed 2010·Application pending·0 cites
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