Assignee
LIN YAOJIAN
SG72 patents
Top patents by PatentIndex Score
US8796846B2Aug 5, 2014
Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP
LIN YAOJIAN108 citations99
US8193604B2Jun 5, 2012
Semiconductor package with semiconductor core structure and method of forming the same
LIN YAOJIAN152 citations99
US9679863B2Jun 13, 2017
Semiconductor device and method of forming interconnect substrate for FO-WLCSP
LIN YAOJIAN59 citations98
US9385006B2Jul 5, 2016
Semiconductor device and method of forming an embedded SOP fan-out package
LIN YAOJIAN71 citations98
US9082806B2Jul 14, 2015
Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
LIN YAOJIAN72 citations98
US8810024B2Aug 19, 2014
Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
LIN YAOJIAN62 citations98
US8445323B2May 21, 2013
Semiconductor package with semiconductor core structure and method of forming same
LIN YAOJIAN37 citations98
US9385009B2Jul 5, 2016
Semiconductor device and method of forming stacked vias within interconnect structure for Fo-WLCSP
LIN YAOJIAN55 citations96
US8907476B2Dec 9, 2014
Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
LIN YAOJIAN12 citations93
US8592992B2Nov 26, 2013
Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSP
LIN YAOJIAN34 citations93
US8456002B2Jun 4, 2013
Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief
LIN YAOJIAN13 citations93
US8168470B2May 1, 2012
Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound
LIN YAOJIAN28 citations93
US9484259B2Nov 1, 2016
Semiconductor device and method of forming protection and support structure for conductive interconnect structure
LIN YAOJIAN7 citations84
US9082780B2Jul 14, 2015
Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
LIN YAOJIAN10 citations84
US8975111B2Mar 10, 2015
Wafer level die integration and method therefor
LIN YAOJIAN12 citations84
US8912648B2Dec 16, 2014
Semiconductor device and method of forming compliant stress relief buffer around large array WLCSP
LIN YAOJIAN6 citations84
US8900929B2Dec 2, 2014
Semiconductor device and method for forming openings and trenches in insulating layer by first LDA and second LDA for RDL formation
LIN YAOJIAN5 citations84
US8648470B2Feb 11, 2014
Semiconductor device and method of forming FO-WLCSP with multiple encapsulants
LIN YAOJIAN12 citations84
US8624353B2Jan 7, 2014
Semiconductor device and method of forming integrated passive device over semiconductor die with conductive bridge and fan-out redistribution layer
LIN YAOJIAN13 citations84
US8592311B2Nov 26, 2013
Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
LIN YAOJIAN5 citations84
US8575018B2Nov 5, 2013
Semiconductor device and method of forming bump structure with multi-layer UBM around bump formation area
LIN YAOJIAN7 citations84
US8513812B2Aug 20, 2013
Semiconductor device and method of forming integrated passive device
LIN YAOJIAN12 citations84
US8502339B2Aug 6, 2013
System-in-package having integrated passive devices and method therefor
LIN YAOJIAN5 citations84
US8487438B2Jul 16, 2013
Integrated circuit system having different-size solder bumps and different-size bonding pads
LIN YAOJIAN10 citations84
US8445990B2May 21, 2013
Semiconductor device and method of forming an inductor within interconnect layer vertically separated from semiconductor die
LIN YAOJIAN18 citations84
US8409970B2Apr 2, 2013
Semiconductor device and method of making integrated passive devices
LIN YAOJIAN10 citations84
US8409926B2Apr 2, 2013
Semiconductor device and method of forming insulating layer around semiconductor die
LIN YAOJIAN12 citations84
US8310058B2Nov 13, 2012
Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
LIN YAOJIAN6 citations84
US8304904B2Nov 6, 2012
Semiconductor device with solder bump formed on high topography plated Cu pads
LIN YAOJIAN6 citations84
US8304339B2Nov 6, 2012
Solder bump with inner core pillar in semiconductor package
LIN YAOJIAN6 citations84
US8263437B2Sep 11, 2012
Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit
LIN YAOJIAN7 citations84
US8183087B2May 22, 2012
Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component
LIN YAOJIAN12 citations84
US8164158B2Apr 24, 2012
Semiconductor device and method of forming integrated passive device
LIN YAOJIAN14 citations84
US8158510B2Apr 17, 2012
Semiconductor device and method of forming IPD on molded substrate
LIN YAOJIAN9 citations84
US8124490B2Feb 28, 2012
Semiconductor device and method of forming passive devices
LIN YAOJIAN9 citations84
US8110477B2Feb 7, 2012
Semiconductor device and method of forming high-frequency circuit structure and method thereof
LIN YAOJIAN6 citations84
US8610286B2Dec 17, 2013
Semiconductor device and method of forming thick encapsulant for stiffness with recesses for stress relief in Fo-WLCSP
LIN YAOJIAN5 citations83
US8492203B2Jul 23, 2013
Semiconductor device and method for forming semiconductor package having build-up interconnect structure over semiconductor die with different CTE insulating layers
LIN YAOJIAN10 citations83
US8183095B2May 22, 2012
Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
LIN YAOJIAN4 citations74
US10192801B2Jan 29, 2019
Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound
LIN YAOJIAN3 citations73
US10074553B2Sep 11, 2018
Wafer level package integration and method
LIN YAOJIAN3 citations73
US9865482B2Jan 9, 2018
Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component
LIN YAOJIAN4 citations73
US9601434B2Mar 21, 2017
Semiconductor device and method of forming openings through insulating layer over encapsulant for enhanced adhesion of interconnect structure
LIN YAOJIAN3 citations73
US9460951B2Oct 4, 2016
Semiconductor device and method of wafer level package integration
LIN YAOJIAN5 citations73
US9349723B2May 24, 2016
Semiconductor device and method of forming passive devices
LIN YAOJIAN4 citations73
US9275877B2Mar 1, 2016
Semiconductor device and method of forming semiconductor package using panel form carrier
LIN YAOJIAN6 citations73
US8895358B2Nov 25, 2014
Semiconductor device and method of forming cavity in PCB containing encapsulant or dummy die having CTE similar to CTE of large array WLCSP
LIN YAOJIAN4 citations73
US9184103B2Nov 10, 2015
Semiconductor device having embedded integrated passive devices electrically interconnected using conductive pillars
LIN YAOJIAN2 citations63
US9082832B2Jul 14, 2015
Semiconductor device and method of forming protection and support structure for conductive interconnect structure
LIN YAOJIAN3 citations63
US9030002B2May 12, 2015
Semiconductor device having IPD structure with smooth conductive layer and bottom-side conductive layer
LIN YAOJIAN2 citations63
Showing the top 50 of 72 patents by PatentIndex Score.