P
US9601434B2ActiveUtilityPatentIndex 73

Semiconductor device and method of forming openings through insulating layer over encapsulant for enhanced adhesion of interconnect structure

Assignee: LIN YAOJIANPriority: Dec 10, 2010Filed: Dec 10, 2010Granted: Mar 21, 2017
Est. expiryDec 10, 2030(~4.4 yrs left)· nominal 20-yr term from priority
Inventors:LIN YAOJIANCHEN KANGFANG JIANMIN
H10W 74/00H10W 72/9413H10W 70/09H10W 70/60H10W 72/241H10W 72/252H10W 72/242H10W 72/01257H10W 72/01225H10W 72/01235H10W 72/01238H10W 72/01223H10W 70/614H10W 74/019H10W 90/701H10W 74/129H10W 74/016H10W 70/685H10W 70/093H10W 70/05H10W 70/65H01L 2224/13139H01L 2224/11334H01L 2924/00014H01L 2924/13091H01L 2224/13116H01L 2224/1145H01L 2224/13124H01L 2924/00H01L 2924/12042H01L 2224/29599H01L 2924/00012H01L 2224/11849H01L 2924/12041H01L 2924/01322H01L 2224/13113H01L 2224/13022H01L 2224/05599H01L 2224/05099H01L 2224/13599H01L 2224/13155H01L 2224/1132H01L 21/568H01L 2924/14H01L 2224/2101H01L 2224/29099H01L 24/19H01L 2224/13111H01L 2924/01029H01L 24/20H01L 23/5389H01L 23/49816H01L 2224/13099H01L 2224/13144H01L 2924/1306H01L 2224/12105H01L 2224/13147H01L 2224/1146H01L 2224/131H01L 2924/014H01L 2924/00013H01L 2924/181H01L 2224/04105H01L 2224/215H01L 2924/01082H01L 2224/221
73
PatentIndex Score
3
Cited by
14
References
24
Claims

Abstract

A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over a portion of the encapsulant within an interconnect site outside a footprint of the semiconductor die. An opening is formed through the first insulating layer within the interconnect site to expose the encapsulant. The opening can be ring-shaped or vias around the interconnect site and within a central region of the interconnect site to expose the encapsulant. A first conductive layer is formed over the first insulating layer to follow a contour of the first insulating layer. A second conductive layer is formed over the first conductive layer and exposed encapsulant. A second insulating layer is formed over the second conductive layer. A bump is formed over the second conductive layer in the interconnect site.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
       1. A method of making a semiconductor device, comprising:
 providing a semiconductor die including a first conductive layer formed on a surface of the semiconductor die; 
 forming a first insulating layer over the surface of the semiconductor die; 
 depositing an encapsulant over the semiconductor die with a surface of the encapsulant coplanar with the surface of the semiconductor die; 
 forming a second insulating layer over the surface of the encapsulant and over the first insulating layer and extending to contact the first conductive layer; 
 forming an interconnect site outside a footprint of the semiconductor die by removing a portion of the second insulating layer within the interconnect site over the encapsulant to form an opening extending to the surface of the encapsulant while leaving a portion of the second insulating layer in an interior region of the interconnect site; and 
 forming a second conductive layer over the interconnect site to contact the portion of the second insulating layer and extending into the opening to contact the surface of the encapsulant. 
 
     
     
       2. The method of  claim 1 , further including forming a bump over the second conductive layer. 
     
     
       3. The method of  claim 1 , wherein the opening includes a ring shape around the portion of the second insulating layer in the interior region of the interconnect site. 
     
     
       4. The method of  claim 1 , wherein the opening includes a plurality of vias disposed around a perimeter of the interconnect site. 
     
     
       5. The method of  claim 1 , further including forming a third conductive layer over the interconnect site. 
     
     
       6. The method of  claim 1 , further including forming a third insulating layer over the second insulating layer. 
     
     
       7. A method of making a semiconductor device, comprising:
 providing a semiconductor die; 
 depositing an encapsulant over the semiconductor die with a surface of the encapsulant coplanar with a surface of the semiconductor die; 
 forming a first insulating layer over the surface of the encapsulant; 
 forming an interconnect site outside a footprint of the semiconductor die by removing a portion of the first insulating layer within the interconnect site over the encapsulant to form an opening extending to the surface of the encapsulant while leaving a portion of the first insulating layer in an interior region of the interconnect site; and 
 forming a first conductive layer over the interconnect site to contact the portion of the first insulating layer and extending into the opening to contact the surface of the encapsulant. 
 
     
     
       8. The method of  claim 7 , further including forming an interconnect structure over the first conductive layer. 
     
     
       9. The method of  claim 8 , wherein the interconnect structure includes a bump. 
     
     
       10. The method of  claim 7 , wherein the opening includes a ring shape around the portion of the second insulating layer in the interior region of the interconnect site. 
     
     
       11. The method of  claim 7 , wherein the opening includes a plurality of vias disposed around a perimeter of the interconnect site. 
     
     
       12. The method of  claim 7 , further including forming a second insulating layer over the surface of the semiconductor die, wherein the first insulating layer extends over the second insulating layer to contact a second conductive layer on the semiconductor die. 
     
     
       13. The method of  claim 7 , further including forming a second insulating layer over the interconnect site. 
     
     
       14. A method of making a semiconductor device, comprising:
 providing a semiconductor die; 
 depositing an encapsulant over the semiconductor die; 
 forming a first insulating layer over a surface of the encapsulant; 
 forming an interconnect site outside a footprint of the semiconductor die by removing a portion of the first insulating layer within the interconnect site over the encapsulant to form an opening extending to the surface of the encapsulant while leaving a portion of the first insulating layer in an interior region of the interconnect site; and 
 forming a first conductive layer over the interconnect site to contact the portion of the first insulating layer and extending into the opening to contact the surface of the encapsulant. 
 
     
     
       15. The method of  claim 14 , further including forming an interconnect structure over the first conductive layer. 
     
     
       16. The method of  claim 14 , wherein the opening includes a ring shape around the portion of the second insulating layer in the interior region of the interconnect site. 
     
     
       17. The method of  claim 14 , wherein the opening includes a plurality of vias disposed around a perimeter of the interconnect site. 
     
     
       18. The method of  claim 14 , further including forming a second conductive layer over the interconnect site. 
     
     
       19. The method of  claim 14 , further including forming a second insulating layer over the semiconductor die, wherein the first insulating layer extends over the second insulating layer to contact a second conductive layer on the semiconductor die. 
     
     
       20. A semiconductor device, comprising:
 a semiconductor die; 
 an encapsulant deposited over the semiconductor die; 
 a first insulating layer formed over a surface of the encapsulant; 
 an interconnect site located outside a footprint of the semiconductor die, wherein the interconnect structures includes an opening in the first insulating layer and a portion of the first insulating layer in an interior region of the interconnect site; 
 a first conductive layer formed over the interconnect site to contact the portion of the first insulating layer and extending into the opening to contact the surface of the encapsulant; and 
 forming a second insulating layer over the surface of the semiconductor die, wherein the first insulating layer extends over the second insulating layer to contact a second conductive layer on the semiconductor die. 
 
     
     
       21. The semiconductor device of  claim 20 , further including forming an interconnect structure over the first conductive layer. 
     
     
       22. The semiconductor device of  claim 20 , wherein the opening includes a ring shape around the portion of the second insulating layer in the interior region of the interconnect site. 
     
     
       23. The semiconductor device of  claim 20 , wherein the opening includes a plurality of vias disposed around a perimeter of the interconnect site. 
     
     
       24. The semiconductor device of  claim 20 , further including a second conductive layer formed over the interconnect site.

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