Inventor · disambiguated record
Yaojian Lin
Also filed as: LIN YAOJIAN
306 granted patents·37 pending applications·4,082 citations·filing 2004–2025
99Inventor score
Files withSTATS CHIPPAC LTD129STATS CHIPPAC PTE LTD77LIN YAOJIAN74PAGAILA REZA A22JCET GROUP CO LTD18
Top patents by PatentIndex Score
343 records- 0199US8980691B2Semiconductor device and method of forming low profile 3D fan-out packageSTATS CHIPPAC LTD·Filed 2013·Granted Mar 17, 2015·98 cites·35 claims
- 0299US8518746B2Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor diePAGAILA REZA A·Filed 2010·Granted Aug 27, 2013·98 cites·20 claims
- 0399US8039303B2Method of forming stress relief layer between die and interconnect structureSTATS CHIPPAC LTD·Filed 2009·Granted Oct 18, 2011·110 cites·25 claims
- 0498US10297518B2Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale packageSTATS CHIPPAC PTE LTD·Filed 2016·Granted May 21, 2019·47 cites·23 claims
- 0598US9786623B2Semiconductor device and method of forming PoP semiconductor device with RDL over top packageSTATS CHIPPAC LTD·Filed 2015·Granted Oct 10, 2017·37 cites·25 claims
- 0698US9679863B2Semiconductor device and method of forming interconnect substrate for FO-WLCSPLIN YAOJIAN·Filed 2011·Granted Jun 13, 2017·59 cites·5 claims
- 0798US9524955B2Semiconductor device and method of forming no-flow underfill material around vertical interconnect structureHUANG RUI·Filed 2012·Granted Dec 20, 2016·49 cites·5 claims
- 0898US9508626B2Semiconductor device and method of forming openings in thermally-conductive frame of FO-WLCSP to dissipate heat and reduce package heightPAGAILA REZA A·Filed 2010·Granted Nov 29, 2016·50 cites·26 claims
- 0998US9443797B2Semiconductor device having wire studs as vertical interconnect in FO-WLPSTATS CHIPPAC LTD·Filed 2013·Granted Sep 13, 2016·55 cites·16 claims
- 1098US9385006B2Semiconductor device and method of forming an embedded SOP fan-out packageLIN YAOJIAN·Filed 2012·Granted Jul 5, 2016·71 cites·32 claims
- 1198US9082806B2Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSPLIN YAOJIAN·Filed 2011·Granted Jul 14, 2015·72 cites·20 claims
- 1298US9064936B2Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSPSTATS CHIPPAC LTD·Filed 2013·Granted Jun 23, 2015·58 cites·12 claims
- 1398US8994185B2Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSPSTATS CHIPPAC LTD·Filed 2013·Granted Mar 31, 2015·44 cites·35 claims
- 1498US8810024B2Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect unitsLIN YAOJIAN·Filed 2012·Granted Aug 19, 2014·62 cites·32 claims
- 1598US8796137B2Semiconductor device and method of forming RDL along sloped side surface of semiconductor die for z-direction interconnectPAGAILA REZA A·Filed 2010·Granted Aug 5, 2014·47 cites·26 claims
- 1698US8796846B2Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSPLIN YAOJIAN·Filed 2009·Granted Aug 5, 2014·108 cites·32 claims
- 1798US8288201B2Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor diePAGAILA REZA A·Filed 2010·Granted Oct 16, 2012·63 cites·25 claims
- 1898US8193604B2Semiconductor package with semiconductor core structure and method of forming the sameLIN YAOJIAN·Filed 2010·Granted Jun 5, 2012·152 cites·24 claims
- 1998US7955942B2Semiconductor device and method of forming a 3D inductor from prefabricated pillar frameSTATS CHIPPAC LTD·Filed 2009·Granted Jun 7, 2011·57 cites·13 claims
- 2098US7923295B2Semiconductor device and method of forming the device using sacrificial carrierSTATS CHIPPAC LTD·Filed 2009·Granted Apr 12, 2011·55 cites·14 claims
- 2198US7858441B2Semiconductor package with semiconductor core structure and method of forming sameSTATS CHIPPAC LTD·Filed 2008·Granted Dec 28, 2010·75 cites·23 claims
- 2298US7799602B2Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structureSTATS CHIPPAC LTD·Filed 2008·Granted Sep 21, 2010·72 cites·20 claims
- 2398US7772046B2Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interferenceSTATS CHIPPAC LTD·Filed 2008·Granted Aug 10, 2010·81 cites·19 claims
- 2498US7642128B1Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSPSTATS CHIPPAC LTD·Filed 2008·Granted Jan 5, 2010·144 cites·20 claims
- 2597US10304817B2Semiconductor device and method of forming build-up interconnect structures over a temporary substrateSTATS CHIPPAC PTE LTD·Filed 2017·Granted May 28, 2019·17 cites·22 claims
- 2697US9941207B2Semiconductor device and method of fabricating 3D package with short cycle time and high yieldSTATS CHIPPAC LTD·Filed 2015·Granted Apr 10, 2018·26 cites·23 claims
- 2797US9842798B2Semiconductor device and method of forming a PoP device with embedded vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2013·Granted Dec 12, 2017·31 cites·6 claims
- 2897US9806040B2Antenna in embedded wafer-level ball-grid array packageSTATS CHIPPAC PTE LTD·Filed 2016·Granted Oct 31, 2017·19 cites·25 claims
- 2997US9548240B2Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor packageSTATS CHIPPAC LTD·Filed 2015·Granted Jan 17, 2017·20 cites·25 claims
- 3097US8822281B2Semiconductor device and method of forming TMV and TSV in WLCSP using same carrierPAGAILA REZA A·Filed 2010·Granted Sep 2, 2014·32 cites·25 claims
- 3197US8592992B2Semiconductor device and method of forming vertical interconnect structure with conductive micro via array for 3-D Fo-WLCSPLIN YAOJIAN·Filed 2011·Granted Nov 26, 2013·34 cites·30 claims
- 3297US8445323B2Semiconductor package with semiconductor core structure and method of forming sameLIN YAOJIAN·Filed 2012·Granted May 21, 2013·37 cites·28 claims
- 3397US8105872B2Semiconductor device and method of forming prefabricated EMI shielding frame with cavities containing penetrable material over semiconductor diePAGAILA REZA A·Filed 2010·Granted Jan 31, 2012·25 cites·20 claims
- 3497US8072059B2Semiconductor device and method of forming UBM fixed relative to interconnect structure for alignment of semiconductor dieSHIM IL KWON·Filed 2009·Granted Dec 6, 2011·54 cites·25 claims
- 3597US8004095B2Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layerSTATS CHIPPAC LTD·Filed 2010·Granted Aug 23, 2011·50 cites·25 claims
- 3697US7993972B2Wafer level die integration and method thereforSTATS CHIPPAC LTD·Filed 2008·Granted Aug 9, 2011·46 cites·21 claims
- 3797US7989270B2Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitorsSTATS CHIPPAC LTD·Filed 2009·Granted Aug 2, 2011·45 cites·24 claims
- 3897US7772081B2Semiconductor device and method of forming high-frequency circuit structure and method thereofSTATS CHIPPAC LTD·Filed 2008·Granted Aug 10, 2010·67 cites·18 claims
- 3997US7767496B2Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layerSTATS CHIPPAC LTD·Filed 2007·Granted Aug 3, 2010·46 cites·19 claims
- 4097US7691747B2Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structuresSTATS CHIPPAC LTD·Filed 2007·Granted Apr 6, 2010·62 cites·19 claims
- 4197US7648911B2Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole viasSTATS CHIPPAC LTD·Filed 2008·Granted Jan 19, 2010·44 cites·19 claims
- 4296US12094729B2Semiconductor device with encapsulant deposited along sides and surface edge of semiconductor die in embedded WLCSPSTATS CHIPPAC PTE LTD·Filed 2021·Granted Sep 17, 2024·2 cites·22 claims
- 4396US11024561B2Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC PTE LTD·Filed 2020·Granted Jun 1, 2021·3 cites·25 claims
- 4496US10049964B2Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect unitsSTATS CHIPPAC LTD·Filed 2013·Granted Aug 14, 2018·21 cites·22 claims
- 4596US9768155B2Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSPSTATS CHIPPAC LTD·Filed 2015·Granted Sep 19, 2017·14 cites·19 claims
- 4696US9527723B2Semiconductor device and method of forming microelectromechanical systems (MEMS) packageSTATS CHIPPAC LTD·Filed 2015·Granted Dec 27, 2016·25 cites·12 claims
- 4796US9171797B2System-in-package having integrated passive devices and method thereforSTATS CHIPPAC LTD·Filed 2013·Granted Oct 27, 2015·18 cites·25 claims
- 4896US8343809B2Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor dieSTATS CHIPPAC LTD·Filed 2010·Granted Jan 1, 2013·23 cites·27 claims
- 4996US8039960B2Solder bump with inner core pillar in semiconductor packageSTATS CHIPPAC LTD·Filed 2007·Granted Oct 18, 2011·43 cites·23 claims
- 5096US7859085B2Semiconductor device and method of forming embedded passive circuit elements interconnected to through hole viasSTATS CHIPPAC LTD·Filed 2009·Granted Dec 28, 2010·33 cites·24 claims
Showing the top 50 of 343 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →