Assignee
MEGAMOS CORP
US17 patents
Top patents by PatentIndex Score
US5895951AApr 20, 1999
MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches
MEGAMOS CORP239 citations99
US5877528AMar 2, 1999
Structure to provide effective channel-stop in termination areas for trenched power transistors
MEGAMOS CORP287 citations99
US6281547B1Aug 28, 2001
Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask
MEGAMOS CORP127 citations98
US5907169AMay 25, 1999
Self-aligned and process-adjusted high density power transistor with gate sidewalls provided with punch through prevention and reduced JFET resistance
MEGAMOS CORP65 citations96
US5930630AJul 27, 1999
Method for device ruggedness improvement and on-resistance reduction for power MOSFET achieved by novel source contact structure
MEGAMOS CORP72 citations94
US6104060AAug 15, 2000
Cost savings for manufacturing planar MOSFET devices achieved by implementing an improved device structure and fabrication process eliminating passivation layer and/or field plate
MEGAMOS CORP40 citations92
US5986304ANov 16, 1999
Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners
MEGAMOS CORP47 citations92
US5923065AJul 13, 1999
Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings
MEGAMOS CORP30 citations92
US5877529AMar 2, 1999
Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness
MEGAMOS CORP24 citations92
US5763914AJun 9, 1998
Cell topology for power transistors with increased packing density
MEGAMOS CORP32 citations92
US5731611AMar 24, 1998
MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones
MEGAMOS CORP26 citations92
US5729037AMar 17, 1998
MOSFET structure and fabrication process for decreasing threshold voltage
MEGAMOS CORP30 citations92
US5668026ASep 16, 1997
DMOS fabrication process implemented with reduced number of masks
MEGAMOS CORP34 citations92
US5747853AMay 5, 1998
Semiconductor structure with controlled breakdown protection
MEGAMOS CORP30 citations85
US6046078AApr 4, 2000
Semiconductor device fabrication with reduced masking steps
MEGAMOS CORP16 citations84
US5883416AMar 16, 1999
Gate-contact structure to prevent contact metal penetration through gate layer without affecting breakdown voltage
MEGAMOS CORP14 citations74
US5883410AMar 16, 1999
Edge wrap-around protective extension for covering and protecting edges of thick oxide layer
MEGAMOS CORP11 citations74