Assignee
RAJSKI JANUSZ
US·34 granted patents·3 pending applications·1,238 citations·filing 2002–2018
Top patents by PatentIndex Score
37 records- 0199US7818644B2Multi-stage test response compactorsRAJSKI JANUSZ·Filed 2007·Granted Oct 19, 2010·65 cites·60 claims
- 0298US7523372B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2007·Granted Apr 21, 2009·42 cites·21 claims
- 0398US7509546B2Test pattern compression for an integrated circuit test environmentRAJSKI JANUSZ·Filed 2006·Granted Mar 24, 2009·47 cites·21 claims
- 0498US7506232B2Decompressor/PRPG for applying pseudo-random and deterministic test patternsRAJSKI JANUSZ·Filed 2006·Granted Mar 17, 2009·47 cites·12 claims
- 0598US7111209B2Test pattern compression for an integrated circuit test environmentRAJSKI JANUSZ·Filed 2003·Granted Sep 19, 2006·92 cites·19 claims
- 0698US7093175B2Decompressor/PRPG for applying pseudo-random and deterministic test patternsRAJSKI JANUSZ·Filed 2003·Granted Aug 15, 2006·102 cites·12 claims
- 0797US7797603B2Low power decompression of test cubesRAJSKI JANUSZ·Filed 2007·Granted Sep 14, 2010·59 cites·36 claims
- 0897US7653851B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2009·Granted Jan 26, 2010·32 cites·18 claims
- 0997US7647540B2Decompressors for low power decompression of test patternsRAJSKI JANUSZ·Filed 2007·Granted Jan 12, 2010·41 cites·24 claims
- 1097US7512508B2Determining and analyzing integrated circuit yield and qualityRAJSKI JANUSZ·Filed 2005·Granted Mar 31, 2009·54 cites·57 claims
- 1196US7500163B2Method and apparatus for selectively compacting test responsesRAJSKI JANUSZ·Filed 2004·Granted Mar 3, 2009·60 cites·22 claims
- 1296US7260591B2Method for synthesizing linear finite state machinesRAJSKI JANUSZ·Filed 2004·Granted Aug 21, 2007·53 cites·20 claims
- 1395US7437640B2Fault diagnosis of compressed test responses having one or more unknown statesRAJSKI JANUSZ·Filed 2005·Granted Oct 14, 2008·37 cites·24 claims
- 1495US7370254B2Compressing test responses using a compactorRAJSKI JANUSZ·Filed 2004·Granted May 6, 2008·82 cites·43 claims
- 1594US8166359B2Selective per-cycle masking of scan chains for system level testRAJSKI JANUSZ·Filed 2008·Granted Apr 24, 2012·19 cites·17 claims
- 1694US7302624B2Adaptive fault diagnosis of compressed test responsesRAJSKI JANUSZ·Filed 2005·Granted Nov 27, 2007·45 cites·28 claims
- 1794US7263641B2Phase shifter with reduced linear dependencyRAJSKI JANUSZ·Filed 2004·Granted Aug 28, 2007·51 cites·19 claims
- 1894US6966021B2Method and apparatus for at-speed testing of digital circuitsRAJSKI JANUSZ·Filed 2002·Granted Nov 15, 2005·84 cites·23 claims
- 1993US8726112B2Scan test application through high-speed serial input/outputsRAJSKI JANUSZ·Filed 2009·Granted May 13, 2014·28 cites·44 claims
- 2093US7509550B2Fault diagnosis of compressed test responsesRAJSKI JANUSZ·Filed 2005·Granted Mar 24, 2009·36 cites·32 claims
- 2192US8108743B2Method and apparatus for selectively compacting test responsesRAJSKI JANUSZ·Filed 2010·Granted Jan 31, 2012·7 cites·17 claims
- 2292US7478296B2Continuous application and decompression of test patterns to a circuit-under-testRAJSKI JANUSZ·Filed 2003·Granted Jan 13, 2009·46 cites·16 claims
- 2391US8499209B2At-speed scan testing with controlled switching activityRAJSKI JANUSZ·Filed 2010·Granted Jul 30, 2013·12 cites·23 claims
- 2489US7743302B2Compressing test responses using a compactorRAJSKI JANUSZ·Filed 2008·Granted Jun 22, 2010·17 cites·30 claims
- 2587US8301945B2Decompressors for low power decompression of test patternsRAJSKI JANUSZ·Filed 2011·Granted Oct 30, 2012·5 cites·20 claims
- 2686US8533547B2Continuous application and decompression of test patterns and selective compaction of test responsesRAJSKI JANUSZ·Filed 2011·Granted Sep 10, 2013·6 cites·11 claims
- 2786US6954888B2Arithmetic built-in self-test of multiple scan-based integrated circuitsRAJSKI JANUSZ·Filed 2004·Granted Oct 11, 2005·34 cites·21 claims
- 2882US9088522B2Test scheduling with pattern-independent test access mechanismRAJSKI JANUSZ·Filed 2012·Granted Jul 21, 2015·5 cites·18 claims
- 2982US8726113B2Selective per-cycle masking of scan chains for system level testRAJSKI JANUSZ·Filed 2012·Granted May 13, 2014·4 cites·25 claims
- 3082US7437636B2Method and apparatus for at-speed testing of digital circuitsRAJSKI JANUSZ·Filed 2005·Granted Oct 14, 2008·10 cites·24 claims
- 3171US8201131B2Generating test patterns having enhanced coverage of untargeted defectsRAJSKI JANUSZ·Filed 2009·Granted Jun 12, 2012·4 cites·24 claims
- 3266US7509600B2Generating test patterns having enhanced coverage of untargeted defectsRAJSKI JANUSZ·Filed 2004·Granted Mar 24, 2009·10 cites·58 claims
- 3365US8683280B2Test generator for low power built-in self-testRAJSKI JANUSZ·Filed 2012·Granted Mar 25, 2014·1 cites·20 claims
- 3465US2018143249A1Selective per-cycle masking of scan chains for system level testRAJSKI JANUSZ·Filed 2018·Application pending·0 cites
- 3547US2009210183A1Determining and analyzing integrated circuit yield and qualityRAJSKI JANUSZ·Filed 2009·Application pending·0 cites
- 3642US8161338B2Modular compaction of test responsesRAJSKI JANUSZ·Filed 2006·Granted Apr 17, 2012·1 cites·44 claims
- 3737US2012209556A1Low Power Scan-Based TestingRAJSKI JANUSZ·Filed 2012·Application pending·0 cites
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