Assignee
WILLEY AARON
US·11 granted patents·44 citations·filing 2010–2012
Top patents by PatentIndex Score
11 records- 0191US8283950B2Delay lines, amplifier systems, transconductance compensating systems and methods of compensatingWILLEY AARON·Filed 2010·Granted Oct 9, 2012·14 cites·9 claims
- 0286US8729941B2Differential amplifiers, clock generator circuits, delay lines and methodsWILLEY AARON·Filed 2010·Granted May 20, 2014·10 cites·9 claims
- 0385US8461889B2Clock signal generators having a reduced power feedback clock path and methods for generating clocksWILLEY AARON·Filed 2010·Granted Jun 11, 2013·5 cites·37 claims
- 0484US8493104B2Clock signal generators having a reduced power feedback clock path and methods for generating clocksWILLEY AARON·Filed 2012·Granted Jul 23, 2013·4 cites·21 claims
- 0573US8829882B2Current generator circuit and method for reduced power consumption and fast responseWILLEY AARON·Filed 2010·Granted Sep 9, 2014·3 cites·24 claims
- 0668US8427204B2Mixed-mode input bufferWILLEY AARON·Filed 2010·Granted Apr 23, 2013·3 cites·8 claims
- 0766US8710871B2Delay lines, amplifier systems, transconductance compensating systems and methods of compensatingWILLEY AARON·Filed 2012·Granted Apr 29, 2014·2 cites·17 claims
- 0866US8604850B2Measurement initialization circuitryWILLEY AARON·Filed 2011·Granted Dec 10, 2013·2 cites·30 claims
- 0956US8779802B2Delay lines, amplifier systems, transconductance compensating systems and methods of compensatingWILLEY AARON·Filed 2012·Granted Jul 15, 2014·1 cites·18 claims
- 1044US8405214B2Semiconductor package structure with common gold plated metal conductor on die and substrateWILLEY AARON·Filed 2011·Granted Mar 26, 2013·0 cites·24 claims
- 1136US8901938B2Delay line scheme with no exit treeWILLEY AARON·Filed 2012·Granted Dec 2, 2014·0 cites·22 claims
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