Assignee
CHO MINSIK
US·5 granted patents·1 pending application·67 citations·filing 2010–2012
Top patents by PatentIndex Score
6 records- 0193US8799844B2Layout decomposition method and apparatus for multiple patterning lithographyCHO MINSIK·Filed 2011·Granted Aug 5, 2014·11 cites·9 claims
- 0293US8271920B2Converged large block and structured synthesis for high performance microprocessor designsCHO MINSIK·Filed 2010·Granted Sep 18, 2012·34 cites·22 claims
- 0389US8495552B1Structured latch and local-clock-buffer planningCHO MINSIK·Filed 2012·Granted Jul 23, 2013·13 cites·15 claims
- 0482US8516412B2Soft hierarchy-based physical synthesis for large-scale, high-performance circuitsCHO MINSIK·Filed 2011·Granted Aug 20, 2013·8 cites·23 claims
- 0561US8756541B2Relative ordering circuit synthesisCHO MINSIK·Filed 2012·Granted Jun 17, 2014·1 cites·23 claims
- 0649US2013326451A1Structured Latch and Local-Clock-Buffer PlanningCHO MINSIK·Filed 2012·Application pending·0 cites
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