Assignee
HICKEY MARK J
US·9 granted patents·1 pending application·39 citations·filing 2007–2011
Top patents by PatentIndex Score
10 records- 0186US8930432B2Floating point execution unit with fixed point functionalityHICKEY MARK J·Filed 2011·Granted Jan 6, 2015·10 cites·22 claims
- 0286US8412980B2Fault tolerant stability critical execution checking using redundant execution pipelinesHICKEY MARK J·Filed 2010·Granted Apr 2, 2013·9 cites·19 claims
- 0380US8412760B2Dynamic range adjusting floating point execution unitHICKEY MARK J·Filed 2008·Granted Apr 2, 2013·9 cites·18 claims
- 0477US8880852B2Detecting logically non-significant operation based on opcode and operand and setting flag to decode address specified in subsequent instruction as different addressHICKEY MARK J·Filed 2011·Granted Nov 4, 2014·4 cites·25 claims
- 0572US9195463B2Processing core with speculative register preprocessing in unused execution unit cyclesHICKEY MARK J·Filed 2011·Granted Nov 24, 2015·3 cites·25 claims
- 0671US8629867B2Performing vector multiplicationHICKEY MARK J·Filed 2010·Granted Jan 14, 2014·3 cites·17 claims
- 0761US8522254B2Programmable integrated processor blocksHICKEY MARK J·Filed 2010·Granted Aug 27, 2013·1 cites·18 claims
- 0844US10261793B2Instruction predication using instruction address pattern matchingHICKEY MARK J·Filed 2011·Granted Apr 16, 2019·0 cites·18 claims
- 0941US9075599B2Opcode space minimizing architecture utilizing a least significant portion of an instruction address as upper register address bitsHICKEY MARK J·Filed 2010·Granted Jul 7, 2015·0 cites·4 claims
- 1040US2007234191A1Methods and apparatus for dynamically reconfigurable parallel data error checkingHICKEY MARK J·Filed 2007·Application pending·0 cites
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