Assignee
MENON SANKARAN M
US·5 granted patents·1 pending application·23 citations·filing 2004–2013
Top patents by PatentIndex Score
6 records- 0179US8924786B2No-touch stress testing of memory I/O interfacesMENON SANKARAN M·Filed 2012·Granted Dec 30, 2014·9 cites·26 claims
- 0275US9632895B2Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCsMENON SANKARAN M·Filed 2013·Granted Apr 25, 2017·5 cites·28 claims
- 0375US9201448B2Observing embedded signals of varying clock domains by fowarding signals within a system on a chip concurrently with a logic module clock signalMENON SANKARAN M·Filed 2012·Granted Dec 1, 2015·4 cites·21 claims
- 0471US9043649B2Method and apparatus for output of high-bandwidth debug data/traces in ICS and SoCs using embedded high speed debugMENON SANKARAN M·Filed 2012·Granted May 26, 2015·3 cites·25 claims
- 0562US8904253B2Method and apparatus for testing I/O boundary scan chain for SoC's having I/O's powered off by defaultMENON SANKARAN M·Filed 2012·Granted Dec 2, 2014·2 cites·30 claims
- 0645US2006075296A1Method, apparatus and system for data integrity of state retentive elements under low power modesMENON SANKARAN M·Filed 2004·Application pending·0 cites
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