Assignee
PDF SOLUTIONS INC
US·190 granted patents·12 pending applications·2,476 citations·filing 1999–2025
Top patents by PatentIndex Score
202 records- 0199US9496119B1E-beam inspection apparatus and method of using the same on various integrated circuit chipsPDF SOLUTIONS INC·Filed 2016·Granted Nov 15, 2016·77 cites·21 claims
- 0299US7592827B1Apparatus and method for electrical detection and localization of shorts in metal interconnect linesPDF SOLUTIONS INC·Filed 2007·Granted Sep 22, 2009·114 cites·8 claims
- 0398US10593604B1Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Mar 17, 2020·19 cites·19 claims
- 0498US9870962B1Integrated circuit including NCEM-enabled, interlayer overlap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gatesPDF SOLUTIONS INC·Filed 2017·Granted Jan 16, 2018·13 cites·19 claims
- 0598US9799575B2Integrated circuit containing DOEs of NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Oct 24, 2017·19 cites·11 claims
- 0698US7278118B2Method and process for design of integrated circuits using regular geometry patterns to obtain geometrically consistent component featuresPDF SOLUTIONS INC·Filed 2005·Granted Oct 2, 2007·212 cites·31 claims
- 0798US6834375B1System and method for product yield prediction using a logic characterization vehiclePDF SOLUTIONS INC·Filed 2000·Granted Dec 21, 2004·246 cites·11 claims
- 0897US11295993B2Maintenance scheduling for semiconductor manufacturing equipmentPDF SOLUTIONS INC·Filed 2020·Granted Apr 5, 2022·6 cites·20 claims
- 0997US9805994B1Mesh-style NCEM pads, and process for making semiconductor dies, chips, and wafers using in-line measurements from such padsPDF SOLUTIONS INC·Filed 2016·Granted Oct 31, 2017·15 cites·18 claims
- 1097US9627370B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Apr 18, 2017·15 cites·20 claims
- 1197US7739065B1Inspection plan optimization based on layout attributes and process variancePDF SOLUTIONS INC·Filed 2007·Granted Jun 15, 2010·89 cites·41 claims
- 1297US6901564B2System and method for product yield predictionPDF SOLUTIONS INC·Filed 2002·Granted May 31, 2005·143 cites·45 claims
- 1397US6826738B2Optimization of die placement on wafersPDF SOLUTIONS INC·Filed 2003·Granted Nov 30, 2004·213 cites·18 claims
- 1497US6795952B1System and method for product yield prediction using device and process neighborhood characterization vehiclePDF SOLUTIONS INC·Filed 2002·Granted Sep 21, 2004·264 cites·20 claims
- 1596US10978438B1IC with test structures and E-beam pads embedded within a contiguous standard cell areaPDF SOLUTIONS INC·Filed 2019·Granted Apr 13, 2021·9 cites·14 claims
- 1696US6449749B1System and method for product yield predictionPDF SOLUTIONS INC·Filed 1999·Granted Sep 10, 2002·202 cites·16 claims
- 1795US9595536B1Standard cell library that includes 13-CPP and 17-CPP D flip-flop cells, with DFM-optimized M0 cuts and V0 adjacenciesPDF SOLUTIONS INC·Filed 2016·Granted Mar 14, 2017·13 cites·27 claims
- 1895US7174521B2System and method for product yield predictionPDF SOLUTIONS INC·Filed 2005·Granted Feb 6, 2007·32 cites·36 claims
- 1994US9461065B1Standard cell library with DFM-optimized M0 cuts and V0 adjacenciesPDF SOLUTIONS INC·Filed 2016·Granted Oct 4, 2016·10 cites·25 claims
- 2094US2026009845A1Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic blockPDF SOLUTIONS INC·Filed 2025·Application pending·0 cites
- 2193US10768222B1Method and apparatus for direct testing and characterization of a three dimensional semiconductor memory structurePDF SOLUTIONS INC·Filed 2018·Granted Sep 8, 2020·13 cites·20 claims
- 2293US9741703B1Integrated circuit containing standard logic cells and ilbrary-compatible, NCEM-enabled fill cells, including at least via-open-configured, gate-short-configured, TS-short-configured, and AA-short-conigured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Aug 22, 2017·4 cites·20 claims
- 2393US9691672B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and metal-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Jun 27, 2017·4 cites·20 claims
- 2493US9627371B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, GATE-short-configured, GATECNT-short-configured, and AA-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Apr 18, 2017·7 cites·20 claims
- 2593US7487474B2Designing an integrated circuit to improve yield using a variant design elementPDF SOLUTIONS INC·Filed 2003·Granted Feb 3, 2009·182 cites·64 claims
- 2692US11029673B2Generating robust machine learning predictions for semiconductor manufacturing processesPDF SOLUTIONS INC·Filed 2018·Granted Jun 8, 2021·9 cites·17 claims
- 2792US7935965B1Test structures and methods for electrical characterization of alignment of line patterns defined with double patterningPDF SOLUTIONS INC·Filed 2008·Granted May 3, 2011·18 cites·13 claims
- 2892US7434197B1Method for improving mask layout and fabricationPDF SOLUTIONS INC·Filed 2005·Granted Oct 7, 2008·21 cites·21 claims
- 2992US7356800B2System and method for product yield predictionPDF SOLUTIONS INC·Filed 2006·Granted Apr 8, 2008·15 cites·20 claims
- 3092US2026011529A1Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cellPDF SOLUTIONS INC·Filed 2025·Application pending·0 cites
- 3191US7673262B2System and method for product yield predictionPDF SOLUTIONS INC·Filed 2008·Granted Mar 2, 2010·11 cites·20 claims
- 3291US7373625B2System and method for product yield predictionPDF SOLUTIONS INC·Filed 2006·Granted May 13, 2008·12 cites·29 claims
- 3390US10199288B1Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one side-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective side-to-side short, corner short, and via open test areasPDF SOLUTIONS INC·Filed 2018·Granted Feb 5, 2019·2 cites·20 claims
- 3490US10199283B1Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2017·Granted Feb 5, 2019·3 cites·20 claims
- 3590US9905487B1Process for making semiconductor dies, chips, and wafers using non-contact measurements obtained from DOEs of NCEM-enabled fill cells on test wafers that include multiple means/steps for enabling NC detection of V0 via opensPDF SOLUTIONS INC·Filed 2016·Granted Feb 27, 2018·3 cites·10 claims
- 3689US9786648B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATECNT-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Oct 10, 2017·2 cites·20 claims
- 3789US9773773B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATE-short-configured, and GATECNT-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 26, 2017·2 cites·20 claims
- 3889US9761575B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least chamfer-short-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 12, 2017·2 cites·20 claims
- 3989US7902852B1High density test structure array to support addressable high accuracy 4-terminal measurementsPDF SOLUTIONS INC·Filed 2007·Granted Mar 8, 2011·19 cites·20 claims
- 4088US6978229B1Efficient method for modeling and simulation of the impact of local and global variation on integrated circuitsPDF SOLUTIONS INC·Filed 2000·Granted Dec 20, 2005·53 cites·6 claims
- 4187US12429520B2Systems, devices, and methods for performing a non-contact electrical measurement on a cell, non-contact electrical measurement cell vehicle, chip, wafer, die, or logic blockPDF SOLUTIONS INC·Filed 2024·Granted Sep 30, 2025·0 cites·20 claims
- 4287US10290552B1Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2018·Granted May 14, 2019·2 cites·20 claims
- 4387US10199294B1Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stagePDF SOLUTIONS INC·Filed 2018·Granted Feb 5, 2019·1 cites·20 claims
- 4487US9761573B1Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATE-short-configured, and TS-short-configured, NCEM-enabled fill cellsPDF SOLUTIONS INC·Filed 2016·Granted Sep 12, 2017·2 cites·20 claims
- 4587US9529954B1Standard cell library with DFM-optimized M0 cutsPDF SOLUTIONS INC·Filed 2016·Granted Dec 27, 2016·6 cites·20 claims
- 4686US10096530B1Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including stitch open configured fill cellsPDF SOLUTIONS INC·Filed 2017·Granted Oct 9, 2018·4 cites·14 claims
- 4786US9627408B1D flip-flop cells, with DFM-optimized M0 cuts and V0 adjacenciesPDF SOLUTIONS INC·Filed 2016·Granted Apr 18, 2017·4 cites·27 claims
- 4885US12431333B2Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cellPDF SOLUTIONS INC·Filed 2024·Granted Sep 30, 2025·0 cites·5 claims
- 4985US11029359B2Failure detection and classsification using sensor data and/or measurement dataPDF SOLUTIONS INC·Filed 2019·Granted Jun 8, 2021·8 cites·19 claims
- 5085US9947601B1Integrated circuit including NCEM-enabled, side-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gatesPDF SOLUTIONS INC·Filed 2017·Granted Apr 17, 2018·1 cites·19 claims
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