Assignee
PENDSE RAJENDRA D
US·46 granted patents·2 pending applications·412 citations·filing 2006–2012
Top patents by PatentIndex Score
48 records- 0198US8318537B2Flip chip interconnection having narrow interconnection sites on the substratePENDSE RAJENDRA D·Filed 2010·Granted Nov 27, 2012·49 cites·25 claims
- 0298US8174119B2Semiconductor package with embedded diePENDSE RAJENDRA D·Filed 2006·Granted May 8, 2012·70 cites·25 claims
- 0396US8841779B2Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substratePENDSE RAJENDRA D·Filed 2010·Granted Sep 23, 2014·22 cites·26 claims
- 0496USRE44431EBump-on-lead flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Aug 13, 2013·16 cites·23 claims
- 0594US8129841B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2009·Granted Mar 6, 2012·29 cites·25 claims
- 0694US8076232B2Semiconductor device and method of forming composite bump-on-lead interconnectionPENDSE RAJENDRA D·Filed 2009·Granted Dec 13, 2011·28 cites·29 claims
- 0793US8525337B2Semiconductor device and method of forming stud bumps over embedded diePENDSE RAJENDRA D·Filed 2012·Granted Sep 3, 2013·12 cites·32 claims
- 0892US8143108B2Semiconductor device and method of dissipating heat from thin package-on-package mounted to substratePENDSE RAJENDRA D·Filed 2010·Granted Mar 27, 2012·14 cites·33 claims
- 0991US8697490B2Flip chip interconnection structurePENDSE RAJENDRA D·Filed 2011·Granted Apr 15, 2014·7 cites·26 claims
- 1091US8476761B2Semiconductor device and method of confining conductive bump material during reflow with solder mask patchPENDSE RAJENDRA D·Filed 2012·Granted Jul 2, 2013·8 cites·25 claims
- 1191US8409920B2Integrated circuit package system for package stacking and method of manufacture thereforPENDSE RAJENDRA D·Filed 2008·Granted Apr 2, 2013·20 cites·10 claims
- 1291US8193035B2Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumpsPENDSE RAJENDRA D·Filed 2010·Granted Jun 5, 2012·10 cites·25 claims
- 1390US8278144B2Flip chip interconnect solder maskPENDSE RAJENDRA D·Filed 2009·Granted Oct 2, 2012·13 cites·23 claims
- 1489US8810029B2Solder joint flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Aug 19, 2014·8 cites·49 claims
- 1589US8574959B2Semiconductor device and method of forming bump-on-lead interconnectionPENDSE RAJENDRA D·Filed 2010·Granted Nov 5, 2013·8 cites·61 claims
- 1686US8304919B2Integrated circuit system with stress redistribution layer and method of manufacture thereofPENDSE RAJENDRA D·Filed 2010·Granted Nov 6, 2012·9 cites·20 claims
- 1786US8129837B2Flip chip interconnection pad layoutPENDSE RAJENDRA D·Filed 2009·Granted Mar 6, 2012·9 cites·7 claims
- 1885US8941235B2Semiconductor device and method of dissipating heat from thin package-on-package mounted to substratePENDSE RAJENDRA D·Filed 2012·Granted Jan 27, 2015·6 cites·27 claims
- 1985US8188598B2Bump-on-lead flip chip interconnectionPENDSE RAJENDRA D·Filed 2011·Granted May 29, 2012·4 cites·36 claims
- 2084US9773685B2Solder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2012·Granted Sep 26, 2017·6 cites·24 claims
- 2183US9029196B2Semiconductor device and method of self-confinement of conductive bump material during reflow without solder maskPENDSE RAJENDRA D·Filed 2010·Granted May 12, 2015·5 cites·40 claims
- 2283US8198186B2Semiconductor device and method of confining conductive bump material during reflow with solder mask patchPENDSE RAJENDRA D·Filed 2009·Granted Jun 12, 2012·7 cites·30 claims
- 2380US8759972B2Semiconductor device and method of forming composite bump-on-lead interconnectionPENDSE RAJENDRA D·Filed 2011·Granted Jun 24, 2014·4 cites·56 claims
- 2480US8525350B2Fusible I/O interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumpsPENDSE RAJENDRA D·Filed 2010·Granted Sep 3, 2013·4 cites·25 claims
- 2578US9125332B2Filp chip interconnection structure with bump on partial pad and method thereofPENDSE RAJENDRA D·Filed 2010·Granted Sep 1, 2015·5 cites·27 claims
- 2678US8853001B2Semiconductor device and method of forming pad layout for flipchip semiconductor diePENDSE RAJENDRA D·Filed 2010·Granted Oct 7, 2014·4 cites·31 claims
- 2777USRE44562ESolder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2012·Granted Oct 29, 2013·3 cites·27 claims
- 2877US8217514B2Integrated circuit packaging system with warpage control system and method of manufacture thereofPENDSE RAJENDRA D·Filed 2009·Granted Jul 10, 2012·6 cites·20 claims
- 2976USRE44438ESemiconductor device and method of dissipating heat from thin package-on-package mounted to substratePENDSE RAJENDRA D·Filed 2012·Granted Aug 13, 2013·4 cites·33 claims
- 3073US8674500B2Semiconductor device and method of self-confinement of conductive bump material during reflow without solder maskPENDSE RAJENDRA D·Filed 2011·Granted Mar 18, 2014·3 cites·46 claims
- 3173US8141247B2Method of a package on package packagingPENDSE RAJENDRA D·Filed 2009·Granted Mar 27, 2012·5 cites·8 claims
- 3272US9545014B2Flip chip interconnect solder maskPENDSE RAJENDRA D·Filed 2012·Granted Jan 10, 2017·1 cites·10 claims
- 3372US9258904B2Semiconductor device and method of forming narrow interconnect sites on substrate with elongated mask openingsPENDSE RAJENDRA D·Filed 2010·Granted Feb 9, 2016·2 cites·30 claims
- 3468US8216930B2Solder joint flip chip interconnection having relief structurePENDSE RAJENDRA D·Filed 2009·Granted Jul 10, 2012·3 cites·36 claims
- 3567US9345148B2Semiconductor device and method of forming flipchip interconnection structure with bump on partial padPENDSE RAJENDRA D·Filed 2010·Granted May 17, 2016·2 cites·24 claims
- 3664US8987014B2Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort testPENDSE RAJENDRA D·Filed 2009·Granted Mar 24, 2015·2 cites·19 claims
- 3763US8269356B2Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substratesPENDSE RAJENDRA D·Filed 2010·Granted Sep 18, 2012·1 cites·9 claims
- 3863US8212352B2Integrated circuit package system with heat sink spacer structuresPENDSE RAJENDRA D·Filed 2008·Granted Jul 3, 2012·2 cites·20 claims
- 3962US9484319B2Semiconductor device and method of forming extended semiconductor device with fan-out interconnect structure to reduce complexity of substratePENDSE RAJENDRA D·Filed 2011·Granted Nov 1, 2016·1 cites·17 claims
- 4059US9545013B2Flip chip interconnect solder maskPENDSE RAJENDRA D·Filed 2012·Granted Jan 10, 2017·0 cites·19 claims
- 4158US8558378B2Bump-on-lead flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Oct 15, 2013·0 cites·25 claims
- 4258USRE44377EBump-on-lead flip chip interconnectionPENDSE RAJENDRA D·Filed 2012·Granted Jul 16, 2013·0 cites·24 claims
- 4352US2008134484A1Apparatus and process for precise encapsulation of flip chip interconnectsPENDSE RAJENDRA D·Filed 2008·Application pending·0 cites
- 4450US9054084B2Integrated circuit having staggered bond pads and I/O cellsPENDSE RAJENDRA D·Filed 2012·Granted Jun 9, 2015·0 cites·12 claims
- 4550US8659172B2Semiconductor device and method of confining conductive bump material with solder mask patchPENDSE RAJENDRA D·Filed 2010·Granted Feb 25, 2014·0 cites·17 claims
- 4647US10388626B2Semiconductor device and method of forming flipchip interconnect structurePENDSE RAJENDRA D·Filed 2010·Granted Aug 20, 2019·0 cites·35 claims
- 4746US9847309B2Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substratePENDSE RAJENDRA D·Filed 2012·Granted Dec 19, 2017·0 cites·7 claims
- 4840US2011306168A1Integrated circuit package system for package stacking and method of manufacture thereofPENDSE RAJENDRA D·Filed 2011·Application pending·0 cites
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