Assignee
POLISHCHUK IGOR
US·11 granted patents·1 pending application·210 citations·filing 2008–2013
Top patents by PatentIndex Score
12 records- 0198US8063434B1Memory transistor with multiple charge storing layers and a high work function gate electrodePOLISHCHUK IGOR·Filed 2008·Granted Nov 22, 2011·93 cites·9 claims
- 0297US8860122B1Nonvolatile charge trap memory device having a high dielectric constant blocking regionPOLISHCHUK IGOR·Filed 2011·Granted Oct 14, 2014·30 cites·11 claims
- 0397US8633537B2Memory transistor with multiple charge storing layers and a high work function gate electrodePOLISHCHUK IGOR·Filed 2012·Granted Jan 21, 2014·23 cites·19 claims
- 0496US8859374B1Memory transistor with multiple charge storing layers and a high work function gate electrodePOLISHCHUK IGOR·Filed 2011·Granted Oct 14, 2014·19 cites·16 claims
- 0594US8592891B1Methods for fabricating semiconductor memory with process induced strainPOLISHCHUK IGOR·Filed 2012·Granted Nov 26, 2013·19 cites·20 claims
- 0690US9431549B2Nonvolatile charge trap memory device having a high dielectric constant blocking regionPOLISHCHUK IGOR·Filed 2012·Granted Aug 30, 2016·7 cites·7 claims
- 0786US9128577B2Hybrid capacitive touch system design and methodPOLISHCHUK IGOR·Filed 2013·Granted Sep 8, 2015·9 cites·21 claims
- 0882US8174510B2Capacitive touch screenPOLISHCHUK IGOR·Filed 2009·Granted May 8, 2012·8 cites·18 claims
- 0968US8691648B1Methods for fabricating semiconductor memory with process induced strainPOLISHCHUK IGOR·Filed 2011·Granted Apr 8, 2014·2 cites·20 claims
- 1053US8638310B1Capacitive touch screenPOLISHCHUK IGOR·Filed 2012·Granted Jan 28, 2014·0 cites·19 claims
- 1149US8780073B2Capacitive sensor arrangementPOLISHCHUK IGOR·Filed 2011·Granted Jul 15, 2014·0 cites·18 claims
- 1249US2009152621A1Nonvolatile charge trap memory device having a high dielectric constant blocking regionPOLISHCHUK IGOR·Filed 2008·Application pending·0 cites
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