Assignee
RAMARAJU RAVINDRARAJ
US·33 granted patents·4 pending applications·168 citations·filing 2006–2014
Top patents by PatentIndex Score
37 records- 0196US8493121B1Reconfigurable flip-flopRAMARAJU RAVINDRARAJ·Filed 2012·Granted Jul 23, 2013·16 cites·23 claims
- 0294US8566836B2Multi-core system on chipRAMARAJU RAVINDRARAJ·Filed 2009·Granted Oct 22, 2013·35 cites·22 claims
- 0392US8339838B2In-line register file bitcellRAMARAJU RAVINDRARAJ·Filed 2011·Granted Dec 25, 2012·16 cites·19 claims
- 0484US9059687B2Flip-flop having shared feedback and method of operationRAMARAJU RAVINDRARAJ·Filed 2014·Granted Jun 16, 2015·5 cites·6 claims
- 0584US8677205B2Hierarchical error correction for large memoriesRAMARAJU RAVINDRARAJ·Filed 2011·Granted Mar 18, 2014·11 cites·20 claims
- 0684US8484523B2Sequential digital circuitry with test scanRAMARAJU RAVINDRARAJ·Filed 2010·Granted Jul 9, 2013·12 cites·16 claims
- 0783US9224439B2Memory with word line access controlRAMARAJU RAVINDRARAJ·Filed 2012·Granted Dec 29, 2015·8 cites·20 claims
- 0881US8806294B2Error detection within a memoryRAMARAJU RAVINDRARAJ·Filed 2012·Granted Aug 12, 2014·6 cites·20 claims
- 0979US8489906B2Data processor having multiple low power modesRAMARAJU RAVINDRARAJ·Filed 2010·Granted Jul 16, 2013·5 cites·20 claims
- 1078US8914712B2Hierarchical error correctionRAMARAJU RAVINDRARAJ·Filed 2012·Granted Dec 16, 2014·7 cites·19 claims
- 1177US9081693B2Data type dependent memory scrubbingRAMARAJU RAVINDRARAJ·Filed 2012·Granted Jul 14, 2015·4 cites·18 claims
- 1277US8533578B2Error detection in a content addressable memory (CAM) and method of operationRAMARAJU RAVINDRARAJ·Filed 2010·Granted Sep 10, 2013·6 cites·20 claims
- 1374US9081719B2Selective memory scrubbing based on data typeRAMARAJU RAVINDRARAJ·Filed 2012·Granted Jul 14, 2015·3 cites·18 claims
- 1474US8537625B2Memory voltage regulator with leakage current voltage controlRAMARAJU RAVINDRARAJ·Filed 2011·Granted Sep 17, 2013·5 cites·21 claims
- 1572US8487656B1Dynamic logic circuitRAMARAJU RAVINDRARAJ·Filed 2012·Granted Jul 16, 2013·3 cites·20 claims
- 1672US8319548B2Integrated circuit having low power mode voltage regulatorRAMARAJU RAVINDRARAJ·Filed 2009·Granted Nov 27, 2012·8 cites·11 claims
- 1768US9317087B2Memory column drowsy controlRAMARAJU RAVINDRARAJ·Filed 2012·Granted Apr 19, 2016·2 cites·19 claims
- 1866US8791739B2Flip-flop having shared feedback and method of operationRAMARAJU RAVINDRARAJ·Filed 2010·Granted Jul 29, 2014·2 cites·15 claims
- 1965US8099580B2Translation look-aside buffer with a tag memory and method thereforRAMARAJU RAVINDRARAJ·Filed 2009·Granted Jan 17, 2012·5 cites·20 claims
- 2064US8542048B2Double edge triggered flip flopRAMARAJU RAVINDRARAJ·Filed 2011·Granted Sep 24, 2013·2 cites·14 claims
- 2163US9021194B2Memory management unit tag memoryRAMARAJU RAVINDRARAJ·Filed 2011·Granted Apr 28, 2015·1 cites·13 claims
- 2260US8143929B2Flip-flop having shared feedback and method of operationRAMARAJU RAVINDRARAJ·Filed 2009·Granted Mar 27, 2012·3 cites·24 claims
- 2354US9117507B2Multistage voltage regulator circuitRAMARAJU RAVINDRARAJ·Filed 2010·Granted Aug 25, 2015·1 cites·21 claims
- 2453US9035629B2Voltage regulator with different inverting gain stagesRAMARAJU RAVINDRARAJ·Filed 2011·Granted May 19, 2015·1 cites·21 claims
- 2553US8199547B2Error detection in a content addressable memory (CAM)RAMARAJU RAVINDRARAJ·Filed 2010·Granted Jun 12, 2012·1 cites·20 claims
- 2651US9542334B2Memory management unit TAG memory with CAM evaluate signalRAMARAJU RAVINDRARAJ·Filed 2011·Granted Jan 10, 2017·0 cites·20 claims
- 2751US9400711B2Content addressable memory with error detectionRAMARAJU RAVINDRARAJ·Filed 2014·Granted Jul 26, 2016·0 cites·18 claims
- 2850US8943292B2System and method for memory array access with fast address decoderRAMARAJU RAVINDRARAJ·Filed 2006·Granted Jan 27, 2015·0 cites·6 claims
- 2948US2016062656A1Command Set Extension for Non-Volatile MemoryRAMARAJU RAVINDRARAJ·Filed 2014·Application pending·0 cites
- 3046US9367475B2System and method for cache accessRAMARAJU RAVINDRARAJ·Filed 2012·Granted Jun 14, 2016·0 cites·18 claims
- 3145US9116799B2Method for detecting bank collision at a memory and device thereforRAMARAJU RAVINDRARAJ·Filed 2013·Granted Aug 25, 2015·0 cites·20 claims
- 3243US9323691B2Multiple page size memory management unitRAMARAJU RAVINDRARAJ·Filed 2012·Granted Apr 26, 2016·0 cites·12 claims
- 3339US9117498B2Memory with power savings for unnecessary readsRAMARAJU RAVINDRARAJ·Filed 2013·Granted Aug 25, 2015·0 cites·20 claims
- 3439US2009237135A1Schmitt trigger having variable hysteresis and method thereforRAMARAJU RAVINDRARAJ·Filed 2008·Application pending·0 cites
- 3537US8710916B2Electronic circuit having shared leakage current reduction circuitsRAMARAJU RAVINDRARAJ·Filed 2011·Granted Apr 29, 2014·0 cites·23 claims
- 3637US2008054943A1Variable switching point circuitRAMARAJU RAVINDRARAJ·Filed 2006·Application pending·0 cites
- 3736US2011181333A1Stacked transistor delay circuit and method of operationRAMARAJU RAVINDRARAJ·Filed 2010·Application pending·0 cites
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