Hierarchical error correction

Abstract

A data processing device can perform error detection and correction in two stages: in the first stage, error detection is performed for the load data using the in-line error detection information. If a first type of error is detected in the data segment, the error is corrected using the in-line error detection information. If a second type of error is detected error correction is performed using the residual sum.

What is claimed is: 
     
       1. A method, comprising:
 determining a first residual sum by performing, by a data processor device, an XOR operation-having operands of a first data segment and a second data segment, each one of the residual sum, the first data segment, and the second data segment having a predetermined number of bits; 
 subsequent to determining the first residual sum detecting an error in the first data segment; and 
 in response to detecting the error, correcting the error, by the data processor device, based on the second data segment and the first residual sum. 
 
     
     
       2. The method of  claim 1 , wherein correcting the error comprises:
 determining a corrected representation of the first data segment by determining a finite field sum of the second data segment and the first residual sum. 
 
     
     
       3. The method of  claim 2 , wherein correcting the error comprises:
 determining an error correction value based on the first residual sum; and 
 performing error detection on the first residual sum based on the error correction value. 
 
     
     
       4. The method of  claim 1 , wherein correcting the error comprises:
 determining a first error correction value based on the first residual sum; 
 determining a second residual sum comprising a finite field sum of the second data segment and a third data segment; 
 determining a second, error correction value based on the second residual sum and the first error correction value; and 
 determining a corrected representation of the first data segment based on the second error correction value. 
 
     
     
       5. The method of  claim 4 , wherein determining the second error correction value comprises:
 determining a third error correction value based on the second residual sum; and 
 determining the second error correction value based on a combination of the third error correction value with the second error correction value. 
 
     
     
       6. The method of  claim 1 , wherein correcting the error comprises:
 storing the second data segment at a memory location; 
 determining an error correction value based on the first residual sum; 
 determining a second residual sum based on uncorrected data retrieved from the memory location; 
 determining error locations based on the error correction value and the second residual sum; and 
 determining a corrected representation of the first data segment by changing values of bits of the first data segment at locations corresponding to the error locations. 
 
     
     
       7. The method of  claim 1 , wherein correcting the error comprises:
 determining a first error correction value based on the first residual sum; 
 determining a second residual sum comprising a finite field sum of the second data segment and a third data segment; 
 determining a second error correction value based on the second residual sum and the first error correction value; and 
 determining in parallel a corrected representation of a first portion of the first data segment based on a first portion of the second error correction value and a corrected representation of a second portion of the first data segment based on a second portion of the second error correction value. 
 
     
     
       8. The method of  claim 1 , wherein correcting the error comprises:
 storing the first data segment and the second data segment at a memory location; 
 determining an error correction value based on the first residual sum; 
 determining a second residual sum based on uncorrected data retrieved from the memory location; 
 determining in parallel first error locations based on a first portion of the error correction value and a first portion of the second residual sum and second error locations based on a second portion of the error correction value and a second portion of the second residual sum; and 
 determining in parallel a corrected representation of the first data segment by changing values of bits of a first portion of the first data segment at locations corresponding to the first error locations and changing values of bits of a second portion of the second data segment at locations corresponding to the second error locations. 
 
     
     
       9. The method of  claim 1 , wherein comprises a cache line of a cache comprises the first data and the second data segment. 
     
     
       10. A method, comprising:
 in response to detecting, by a data processor device, a first type of error at a first data segment, correcting the error, by the data processor device, based on a first error correction value; and 
 in response to detecting, by the data processor device, a second type of error at the first data segment, correcting the error, by the data processor device, based on a first residual sum, the first residual sum determined by performing an XOR operation having operands of the first data segment and a second data segment, each one of the first residual sum, the first data segment, and the second data segment having a predetermined number of bits. 
 
     
     
       11. The method of  claim 10 , wherein correcting the error based on the first residual sum comprises determining a logical combination of the first residual sum and a portion of the second data segment. 
     
     
       12. The method of  claim 11 , wherein determining the logical combination comprises combining the first residual sum and the second data segment according to an exclusive-OR operation. 
     
     
       13. The method of  claim 10 , wherein correcting the error based on the first residual sum comprises determining a logical combination of the first residual sum and the second data segment. 
     
     
       14. The method of  claim 10 , a cache line of a cache comprises the first and second data segments. 
     
     
       15. The method of  claim 14 , further comprising determining the first residual sum based on all data segments of the cache line. 
     
     
       16. A device, comprising:
 a memory comprising a memory region configured to store a plurality of data segments; and 
 an error control circuit, coupled to the memory, and comprising:
 a first error detection module configured to determine determining a first error correction value based on a first data segment of the plurality of data segments; and 
 a second error detection module configured to determine a first residual sum comprising of the result of an XOR operation having operands of the first data segment and a second data segment, the first residual sum, the first data segment, and the second data segment having a predetermined number of bits, and to, in response a first error being detected based on the first error correction value, correcting the error based on the first residual sum. 
 
 
     
     
       17. The device of  claim 16 , wherein the second error detection module is configured to select the second data segment and determine a corrected representation of the first data segment by determining a finite field sum of the second data segment and the first residual sum. 
     
     
       18. The device of  claim 16 , wherein the second error detection module is configured to:
 determine a second error correction value based on the residual sum; 
 select a subset of the plurality of data segments, the subset not including the first data segment; 
 determine a second residual sum comprising a result of an XOR operation having operands of the subset of the plurality of data segments; 
 determine a third error correction value based on the second residual sum and the second error correction value; and 
 determine a corrected representation of the first data segment based on the third error correction value. 
 
     
     
       19. The device of  claim 16 , wherein the second error detection module is configured to:
 store the first data segment and the second data segment at a memory location; 
 determine a second error correction value based on the first residual sum; 
 determine a second residual sum based on uncorrected data retrieved from the memory location; 
 determine error locations based on the second error correction value and the second residual sum; and 
 determine a corrected representation of the first data segment by changing values of bits of the first data segment at locations corresponding to the error locations.