Assignee
SHAEFFER IAN
US·16 granted patents·1 pending application·153 citations·filing 2006–2012
Top patents by PatentIndex Score
17 records- 0197US8108607B2Memory system topologies including a buffer device and an integrated circuit memory deviceSHAEFFER IAN·Filed 2010·Granted Jan 31, 2012·25 cites·24 claims
- 0296US9025409B2Memory buffers and modules supporting dynamic point-to-point connectionsSHAEFFER IAN·Filed 2012·Granted May 5, 2015·21 cites·31 claims
- 0396US8988102B2On-die terminationSHAEFFER IAN·Filed 2012·Granted Mar 24, 2015·13 cites·20 claims
- 0493US9268719B2Memory signal buffers and modules supporting variable access granularitySHAEFFER IAN·Filed 2012·Granted Feb 23, 2016·17 cites·19 claims
- 0593US9098281B2Power-management for integrated circuitsSHAEFFER IAN·Filed 2012·Granted Aug 4, 2015·11 cites·20 claims
- 0692US9176903B2Memory access during memory calibrationSHAEFFER IAN·Filed 2011·Granted Nov 3, 2015·10 cites·22 claims
- 0790US8539152B2Memory system topologies including a buffer device and an integrated circuit memory deviceSHAEFFER IAN·Filed 2011·Granted Sep 17, 2013·6 cites·30 claims
- 0888US8842492B2Memory components and controllers that utilize multiphase synchronous timing referencesSHAEFFER IAN·Filed 2011·Granted Sep 23, 2014·11 cites·20 claims
- 0985US9183166B2Expandable asymmetric-channel memory systemSHAEFFER IAN·Filed 2010·Granted Nov 10, 2015·6 cites·23 claims
- 1083US9176908B2Time multiplexing at different rates to access different memory typesSHAEFFER IAN·Filed 2010·Granted Nov 3, 2015·6 cites·17 claims
- 1182US9665507B2Protocol including a command-specified timing reference signalSHAEFFER IAN·Filed 2011·Granted May 30, 2017·5 cites·33 claims
- 1282US8645617B2Memory device for concurrent and pipelined memory operationsSHAEFFER IAN·Filed 2009·Granted Feb 4, 2014·13 cites·43 claims
- 1380US8868873B2Reconfigurable memory system data strobesSHAEFFER IAN·Filed 2008·Granted Oct 21, 2014·8 cites·19 claims
- 1462US9336834B2Offsetting clock package pins in a clamshell topology to improve signal integritySHAEFFER IAN·Filed 2012·Granted May 10, 2016·1 cites·13 claims
- 1557US8078775B2Memory systems and methods for translating memory addresses to temporal addresses in support of varying data widthsSHAEFFER IAN·Filed 2009·Granted Dec 13, 2011·0 cites·13 claims
- 1650US2007271495A1System to detect and identify errors in control information, read data and/or write dataSHAEFFER IAN·Filed 2006·Application pending·0 cites
- 1742US10445226B2Verify before program resume for memory devicesSHAEFFER IAN·Filed 2011·Granted Oct 15, 2019·0 cites·16 claims
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