Assignee
TOLCHINSKY PETER G
0 granted patents·3 pending applications·0 citations·filing 2004–2008
Top patents by PatentIndex Score
3 records- 0151US2009096025A1Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layerTOLCHINSKY PETER G·Filed 2008·Application pending·0 cites
- 0240US2007063279A1Insulation layer for silicon-on-insulator waferTOLCHINSKY PETER G·Filed 2005·Application pending·0 cites
- 0339US2005217560A1Semiconductor wafers with non-standard crystal orientations and methods of manufacturing the sameTOLCHINSKY PETER G·Filed 2004·Application pending·0 cites
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