US2009096025A1PendingUtilityA1
Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layer
Est. expiryNov 12, 2024(expired)· nominal 20-yr term from priority
H10W 10/181H10P 90/1908H10P 30/209H10P 14/20H10D 86/00
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Abstract
Embodiments of a silicon-on-insulator (SOI) wafer having an etch stop layer overlying the buried oxide layer, as well as embodiments of a method of making the same, are disclosed. The etch stop layer may comprise silicon nitride, nitrogen-doped silicon dioxide, or silicon oxynitride, as well as some combination of these materials. Other embodiments are described and claimed.
Claims
exact text as granted — not AI-modified1 - 26 . (canceled)
27 . A semiconductor wafer comprising:
a base layer comprised of a semiconductor material; a layer of an insulating material overlying the base layer; an etch stop layer overlying the insulating layer; and an upper layer comprised of the semiconductor material overlying the etch stop layer.
28 . The wafer of claim 27 , wherein the semiconductor material comprises silicon and the insulating material comprises silicon dioxide.
29 . The wafer of claim 27 , wherein the etch stop layer comprises a material selected from a group consisting of silicon nitride, nitrogen-doped silicon dioxide, and silicon oxynitride.
30 . The wafer of claim 27 , wherein the etch stop layer comprises at least two materials selected from a group consisting of silicon nitride, nitrogen-doped silicon dioxide, and silicon oxynitride.
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