Inventor · disambiguated record
Irwin Yablok
Also filed as: YABLOK IRWIN
10 granted patents·6 pending applications·408 citations·filing 2002–2013
90Inventor score
Top patents by PatentIndex Score
16 records- 0197US6908027B2Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening processINTEL CORP·Filed 2003·Granted Jun 21, 2005·224 cites·8 claims
- 0296US7491988B2Transistors with increased mobility in the channel zone and method of fabricationINTEL CORP·Filed 2004·Granted Feb 17, 2009·139 cites·28 claims
- 0385US7161224B2Complete device layer transfer without edge exclusion via direct wafer bonding and constrained bond-strengthening processINTEL CORP·Filed 2005·Granted Jan 9, 2007·12 cites·3 claims
- 0457US7473614B2Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layerINTEL CORP·Filed 2004·Granted Jan 6, 2009·6 cites·7 claims
- 0557US6911380B2Method of forming silicon on insulator wafersINTEL CORP·Filed 2002·Granted Jun 28, 2005·5 cites·21 claims
- 0654US6924543B2Method for making a semiconductor device having increased carrier mobilityINTEL CORP·Filed 2003·Granted Aug 2, 2005·6 cites·45 claims
- 0752US7091108B2Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devicesINTEL CORP·Filed 2003·Granted Aug 15, 2006·9 cites·7 claims
- 0851US2009096025A1Method for manufacturing a silicon-on-insulator (SOI) wafer with an etch stop layerTOLCHINSKY PETER G·Filed 2008·Application pending·0 cites
- 0949US7378331B2Methods of vertically stacking wafers using porous siliconINTEL CORP·Filed 2004·Granted May 27, 2008·5 cites·30 claims
- 1047US7531429B2Methods and apparatuses for manufacturing ultra thin device layers for integrated circuit devicesINTEL CORP·Filed 2006·Granted May 12, 2009·2 cites·13 claims
- 1146US2010155880A1Back gate doping for SOI substratesINTEL CORP·Filed 2008·Application pending·0 cites
- 1245US9691632B2Epitaxial wafer and a method of manufacturing thereofSILTRONIC AG·Filed 2013·Granted Jun 27, 2017·0 cites·20 claims
- 1342US2008122042A1Applications of polycrystalline wafersGOLDSTEIN MICHAEL·Filed 2006·Application pending·0 cites
- 1440US2007063279A1Insulation layer for silicon-on-insulator waferTOLCHINSKY PETER G·Filed 2005·Application pending·0 cites
- 1539US2005217560A1Semiconductor wafers with non-standard crystal orientations and methods of manufacturing the sameTOLCHINSKY PETER G·Filed 2004·Application pending·0 cites
- 1637US2005070048A1Devices and methods employing high thermal conductivity heat dissipation substratesFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →