Inventor
MKRTCHYAN GARIK
US6 patents
Patents
6 patentsUS11238206B1Feb 1, 2022
Partition wire assignment for routing multi-partition circuit designs
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US11790139B1Oct 17, 2023
Predicting a performance metric based on features of a circuit design and explaining marginal contributions of the features to the prediction
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US11709521B1Jul 25, 2023
Synchronous clock domain crossing skew optimization and multi-clock buffer (MBUFG)
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US11108644B1Aug 31, 2021
Data processing engine (DPE) array routing
XILINX INC2 citations68
US11875100B1Jan 16, 2024
Distributed parallel processing routing
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US8959474B1Feb 17, 2015
Routing multi-fanout nets
XILINX INC0 citations39