Inventor
ADAMS R DEAN
US16 patents
⚠️ This page may combine multiple inventors who share the name “ADAMS R DEAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
11 patentsUS6163862ADec 19, 2000
On-chip test circuit for evaluating an on-chip signal using an external test signal
IBM459 citations96
US5912901AJun 15, 1999
Method and built-in self-test apparatus for testing an integrated circuit which capture failure information for a selected failure
IBM85 citations95
US6208572B1Mar 27, 2001
Semiconductor memory device having resistive bitline contact testing
IBM75 citations94
US7003704B2Feb 21, 2006
Two-dimensional redundancy calculation
IBM20 citations92
US6874111B1Mar 29, 2005
System initialization of microcode-based memory built-in self-test
IBM48 citations92
US6651201B1Nov 18, 2003
Programmable memory built-in self-test combining microcode and finite state machine self-test
IBM36 citations92
US5592142AJan 7, 1997
High speed greater than or equal to compare circuit
IBM24 citations92
US7308621B2Dec 11, 2007
Testing of ECC memories
IBM28 citations91
US6907554B2Jun 14, 2005
Built-in self test system and method for two-dimensional memory redundancy allocation
IBM11 citations72
US7149941B2Dec 12, 2006
Optimized ECC/redundancy fault recovery
IBM3 citations61
US6181155B1Jan 30, 2001
Method and apparatus for testing dynamic logic using an improved reset pulse
IBM1 citations51
CADENCE DESIGN SYSTEMS INC
4 patentsUS7168005B2Jan 23, 2007
Programable multi-port memory BIST with compact microcode
CADENCE DESIGN SYSTEMS INC91 citations97
US6557127B1Apr 29, 2003
Method and apparatus for testing multi-port memories
CADENCE DESIGN SYSTEMS INC67 citations95
US6681350B2Jan 20, 2004
Method and apparatus for testing memory cells for data retention faults
CADENCE DESIGN SYSTEMS INC6 citations57
US7032144B2Apr 18, 2006
Method and apparatus for testing multi-port memories
CADENCE DESIGN SYSTEMS INC1 citations51