Inventor
MILLER MICHAEL RAYMOND
US24 patents
⚠️ This page may combine multiple inventors who share the name “MILLER MICHAEL RAYMOND”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RAMBUS INC
21 patentsUS12536133B2Jan 27, 2026
Methods and circuits for streaming data to processing elements in stacked processor-plus-memory architecture
RAMBUS INC2 citations74
US11409659B2Aug 9, 2022
Tags and data for caches
RAMBUS INC2 citations69
US12399636B2Aug 26, 2025
Multi-modal refresh of dynamic, random-access memory
RAMBUS INC1 citations64
US12561251B2Feb 24, 2026
Storage and access of data and tags in a multi-way set associative cache
RAMBUS INC0 citations62
US12468441B2Nov 11, 2025
Memory device having hidden refresh
RAMBUS INC0 citations62
US12455824B2Oct 28, 2025
DRAM cache with stacked, heterogenous tag and data dies
RAMBUS INC0 citations62
US12367921B2Jul 22, 2025
System application of DRAM component with cache mode
RAMBUS INC0 citations62
US12346604B2Jul 1, 2025
Stacked device communication
RAMBUS INC0 citations62
US12073111B2Aug 27, 2024
Domain-selective control component
RAMBUS INC0 citations62
US12072807B2Aug 27, 2024
Storage and access of data and tags in a multi-way set associative cache
RAMBUS INC0 citations62
US12001697B2Jun 4, 2024
Multi-modal refresh of dynamic, random-access memory
RAMBUS INC1 citations62
US11960438B2Apr 16, 2024
Methods and circuits for streaming data to processing elements in stacked processor-plus-memory architecture
RAMBUS INC0 citations62
US11934654B2Mar 19, 2024
Memory device having hidden refresh
RAMBUS INC0 citations62
US11922066B2Mar 5, 2024
Stacked device communication
RAMBUS INC0 citations62
US11842762B2Dec 12, 2023
System application of DRAM component with cache mode
RAMBUS INC0 citations62
US12321234B2Jun 3, 2025
Energy efficient storage of error-correction-detection information
RAMBUS INC0 citations61
US12001283B2Jun 4, 2024
Energy efficient storage of error-correction-detection information
RAMBUS INC0 citations61
US11645152B2May 9, 2023
Energy efficient storage of error-correction-detection information
RAMBUS INC0 citations61
US12093180B2Sep 17, 2024
Tags and data for caches
RAMBUS INC0 citations59
US12086441B2Sep 10, 2024
Block copy
RAMBUS INC0 citations52
US12130772B2Oct 29, 2024
Multi-processor device with external interface failover
RAMBUS INC0 citations51
IBM
3 patentsUS6052745AApr 18, 2000
System for asserting burst termination signal and burst complete signal one cycle prior to and during last cycle in fixed length burst transfers
IBM5 citations55
US7764084B2Jul 27, 2010
Apparatus for reducing power consumption with configurable latches and registers
IBM0 citations51
US7474123B1Jan 6, 2009
Method for reducing power consumption with configurable latches and registers
IBM0 citations51