Inventor
CHANG JUNG-HO
TW16 patents
⚠️ This page may combine multiple inventors who share the name “CHANG JUNG-HO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VANGUARD INT SEMICONDUCT CORP
12 patentsUS6037238AMar 14, 2000
Process to reduce defect formation occurring during shallow trench isolation formation
VANGUARD INT SEMICONDUCT CORP90 citations97
US6046083AApr 4, 2000
Growth enhancement of hemispherical grain silicon on a doped polysilicon storage node capacitor structure, for dynamic random access memory applications
VANGUARD INT SEMICONDUCT CORP85 citations96
US6194265B1Feb 27, 2001
Process for integrating hemispherical grain silicon and a nitride-oxide capacitor dielectric layer for a dynamic random access memory capacitor structure
VANGUARD INT SEMICONDUCT CORP24 citations92
US6074931AJun 13, 2000
Process for recess-free planarization of shallow trench isolation
VANGUARD INT SEMICONDUCT CORP47 citations92
US6037219AMar 14, 2000
One step in situ doped amorphous silicon layers used for selective hemispherical grain silicon formation for crown shaped capacitor applications
VANGUARD INT SEMICONDUCT CORP45 citations92
US5930625AJul 27, 1999
Method for fabricating a stacked, or crown shaped, capacitor structure
VANGUARD INT SEMICONDUCT CORP33 citations92
US5913119AJun 15, 1999
Method of selective growth of a hemispherical grain silicon layer on the outer sides of a crown shaped DRAM capacitor structure
VANGUARD INT SEMICONDUCT CORP57 citations92
US5897352AApr 27, 1999
Method of manufacturing hemispherical grained polysilicon with improved adhesion and reduced capacitance depletion
VANGUARD INT SEMICONDUCT CORP40 citations92
US5877052AMar 2, 1999
Resolution of hemispherical grained silicon peeling and row-disturb problems for dynamic random access memory, stacked capacitor structures
VANGUARD INT SEMICONDUCT CORP39 citations92
US6165830ADec 26, 2000
Method to decrease capacitance depletion, for a DRAM capacitor, via selective deposition of a doped polysilicon layer on a selectively formed hemispherical grain silicon layer
VANGUARD INT SEMICONDUCT CORP20 citations84
US6127221AOct 3, 2000
In situ, one step, formation of selective hemispherical grain silicon layer, and a nitride-oxide dielectric capacitor layer, for a DRAM application
VANGUARD INT SEMICONDUCT CORP17 citations84
US6130146AOct 10, 2000
In-situ nitride and oxynitride deposition process in the same chamber
VANGUARD INT SEMICONDUCT CORP7 citations73
WINBOND ELECTRONICS CORP
3 patentsUS6352896B1Mar 5, 2002
Method of manufacturing DRAM capacitor
WINBOND ELECTRONICS CORP13 citations72
US11251273B2Feb 15, 2022
Non-volatile memory device and method for manufacturing the same
WINBOND ELECTRONICS CORP0 citations61
US10971508B2Apr 6, 2021
Integrated circuit and method of manufacturing the same
WINBOND ELECTRONICS CORP0 citations50