Inventor

TSENG HUA-CHOU

TW41 patents

⚠️ This page may combine multiple inventors who share the name “TSENG HUA-CHOU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TSENG HUA-CHOU

UNITED MICROELECTRONICS CORP

Fabrication of a shallow trench isolation by plasma oxidation

Method of measuring thickness of epitaxial layer

Method of forming a self-aligned silicide

Method for forming self-aligned local-halo metal-oxide-semiconductor device

Method for forming doped regions on an SOI device

Method of fabricating a MOS transistor

Method of forming a MOS transistor

Structure and fabrication method of electrostatic discharge protection circuit

Fabrication method of an electrostatic discharge protection circuit with a low resistant current path

Method of manufacturing low-leakage, high-performance device

Method for fabricating a transformer integrated with a semiconductor structure

Front stage process of a fully depleted silicon-on-insulator device

Front stage process of a fully depleted silicon-on-insulator device and a structure thereof

Method of fabricating a MOS transistor on a semiconductor wafer

Fabricating method of stacked type capacitor

Heterojunction bipolar transistor

Method for forming gate contact in complementary metal oxide semiconductor

Method of fabricating inductor and structure formed therefrom

Formation method of SiGe HBT

Method for fabricating a transformer integrated with a semiconductor structure

Fabrication method for heterojunction bipolar transistor

Varactor

TAIWAN SEMICONDUCTOR MFG CO LTD

Transistor with asymmetric source and drain regions

Transistor with asymmetric source and drain regions

Transistor with asymmetric source and drain regions

Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same

Semiconductor device having a double deep well and method of manufacturing same

Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same

Method of forming capacitor structure

Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same

Metal gate transistor, integrated circuits, systems, and fabrication methods thereof

Isolation structure

CHEN SHUO-MAO

Profile design for lateral-vertical bipolar junction transistor

LIANG VICTOR CHIANG

Structure of capacitor set

TSENG HUA-CHOU

Dummy gate for a high voltage transistor device

CHANG LI-WEN

Hard mask for thin film resistor manufacture

LIANG VICTOR-CHIANG

Method for reducing capacitance variation between capacitors

TAIWAN SEMICONDUCTOR MFG

Semiconductor device having a double deep well

HO CHIEN-CHIH

Metal gate transistor, integrated circuits, systems, and fabrication methods thereof

HUA WEI-CHUN

Protection structure for metal-oxide-metal capacitor

YEH DER-CHYANG

Forming bipolar transistor through fast EPI-growth on polysilicon