Inventor
COLON-BONET GLENN T
US21 patents
⚠️ This page may combine multiple inventors who share the name “COLON-BONET GLENN T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HEWLETT PACKARD DEVELOPMENT CO
8 patentsUS6651176B1Nov 18, 2003
Systems and methods for variable control of power dissipation in a pipelined processor
HEWLETT PACKARD DEVELOPMENT CO63 citations96
US6560737B1May 6, 2003
Method for adding scan controllability and observability to domino CMOS with low area and delay overhead
HEWLETT PACKARD DEVELOPMENT CO36 citations90
US6615228B1Sep 2, 2003
Selection based rounding system and method for floating point operations
HEWLETT PACKARD DEVELOPMENT CO14 citations82
US7281147B2Oct 9, 2007
Systems and methods for variable control of power dissipation in a pipelined processor
HEWLETT PACKARD DEVELOPMENT CO9 citations74
US6970897B2Nov 29, 2005
Self-timed transmission system and method for processing multiple data sets
HEWLETT PACKARD DEVELOPMENT CO3 citations63
US6738795B1May 18, 2004
Self-timed transmission system and method for processing multiple data sets
HEWLETT PACKARD DEVELOPMENT CO5 citations63
US6742011B1May 25, 2004
Apparatus and method for increasing performance of multipliers utilizing regular summation circuitry
HEWLETT PACKARD DEVELOPMENT CO3 citations62
US7231414B1Jun 12, 2007
Apparatus and method for performing addition of PKG recoded numbers
HEWLETT PACKARD DEVELOPMENT CO0 citations42
HEWLETT PACKARD CO
7 patentsUS5404324AApr 4, 1995
Methods and apparatus for performing division and square root computations in a computer
HEWLETT PACKARD CO122 citations98
US6285300B1Sep 4, 2001
Apparatus and method for reducing power and noise through reduced switching recording in logic devices
HEWLETT PACKARD CO23 citations92
US5329176AJul 12, 1994
Self-timed clocking system and method for self-timed dynamic logic circuits
HEWLETT PACKARD CO48 citations92
US6381624B1Apr 30, 2002
Faster multiply/accumulator
HEWLETT PACKARD CO64 citations91
US6542093B2Apr 1, 2003
Apparatus and method for reducing power and noise through reduced switching by recoding in a monotonic logic device
HEWLETT PACKARD CO6 citations74
US5424996AJun 13, 1995
Dual transparent latch
HEWLETT PACKARD CO18 citations74
US5740181AApr 14, 1998
Method and apparatus for at speed observability of pipelined circuits
HEWLETT PACKARD CO10 citations72
INST THE DEV OF EMERGING ARCHI
6 patentsUS6151669ANov 21, 2000
Methods and apparatus for efficient control of floating-point status register
INST THE DEV OF EMERGING ARCHI122 citations97
US6301705B1Oct 9, 2001
System and method for deferring exceptions generated during speculative execution
INST THE DEV OF EMERGING ARCHI59 citations96
US6578059B1Jun 10, 2003
Methods and apparatus for controlling exponent range in floating-point calculations
INST THE DEV OF EMERGING ARCHI20 citations92
US6370639B1Apr 9, 2002
Processor architecture having two or more floating-point status fields
INST THE DEV OF EMERGING ARCHI23 citations92
US6408380B1Jun 18, 2002
Execution of an instruction to load two independently selected registers in a single cycle
INST THE DEV OF EMERGING ARCHI10 citations74
US6212539B1Apr 3, 2001
Methods and apparatus for handling and storing bi-endian words in a floating-point processor
INST THE DEV OF EMERGING ARCHI13 citations73