Inventor
KANAKASABAPATHY SIVA
US18 patents
⚠️ This page may combine multiple inventors who share the name “KANAKASABAPATHY SIVA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
14 patentsUS10741660B2Aug 11, 2020
Nanosheet single gate (SG) and extra gate (EG) field effect transistor (FET) co-integration
IBM9 citations84
US10692990B2Jun 23, 2020
Gate cut in RMG
IBM5 citations84
US10553700B2Feb 4, 2020
Gate cut in RMG
IBM6 citations84
US7820552B2Oct 26, 2010
Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack
IBM10 citations84
US10229854B1Mar 12, 2019
FinFET gate cut after dummy gate removal
IBM11 citations83
US10622482B2Apr 14, 2020
Gate cut using selective deposition to prevent oxide loss
IBM4 citations73
US10347540B1Jul 9, 2019
Gate cut using selective deposition to prevent oxide loss
IBM3 citations73
US9627263B1Apr 18, 2017
Stop layer through ion implantation for etch stop
IBM4 citations73
US11990342B2May 21, 2024
Metal cut patterning and etching to minimize interlayer dielectric layer loss
IBM0 citations62
US11133189B2Sep 28, 2021
Metal cut patterning and etching to minimize interlayer dielectric layer loss
IBM0 citations62
US11054250B2Jul 6, 2021
Multi-channel overlay metrology
IBM0 citations59
US10734234B2Aug 4, 2020
Metal cut patterning and etching to minimize interlayer dielectric layer loss
IBM0 citations52
US10644129B2May 5, 2020
Gate cut in RMG
IBM0 citations52
US10167558B1Jan 1, 2019
Phase shifted gas delivery for high throughput and cost effectiveness associated with atomic layer etching and atomic layer deposition
IBM0 citations40