Inventor

CURRIE MATTHEW T

US84 patents

⚠️ This page may combine multiple inventors who share the name “CURRIE MATTHEW T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CURRIE MATTHEW T

AMBERWAVE SYSTEMS CORP

Strained-semiconductor-on-insulator device structures with elevated source/drain regions

Methods of forming strained-semiconductor-on-insulator finFET device structures

Strained-semiconductor-on-insulator device structures

Shallow trench isolation process

Lattice-mismatched semiconductor structures on insulators

Shallow trench isolation process

Methods of forming hybrid fin field-effect transistor structures

Control of strain in device layers by prevention of relaxation

Control of strain in device layers by selective relaxation

Strained-semiconductor-on-insulator finFET device structures

Solutions for integrated circuit integration of alternative active area materials

Methods of forming reacted conductive gate electrodes

Semiconductor devices having strained dual channel layers

Reacted conductive gate electrodes

Gate material for semiconductor device fabrication

Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain

Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes

Strained-semiconductor-on-insulator device structures

Methods for preserving strained semiconductor substrate layers during CMOS processing

Methods of fabricating semiconductor devices having strained dual channel layers

Method of producing high quality relaxed silicon germanium layers

Dynamic random access memory trench capacitors

Methods for forming dielectrics and metal electrodes

Dual-channel CMOS transistors with differentially strained channels

Semiconductor structures with structural homogeneity

Strained germanium-on-insulator device structures

TAIWAN SEMICONDUCTOR MFG

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Methods for forming semiconductor device structures

III-V semiconductor device structures

Methods for forming III-V semiconductor device structures

Semiconductor heterostructures having reduced dislocation pile-ups and related methods

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Hybrid fin field-effect transistor structures and related methods

Hybrid fin field-effect transistor structures and related methods

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

TAIWAN SEMICONDUCTOR MFG CO LTD

Methods for forming semiconductor device structures

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Methods of forming strained-semiconductor-on-insulator device structures

LOCHTEFELD ANTHONY J

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

Methods for forming semiconductor device structures

CURRIE MATTHEW T

Hybrid fin field-effect transistor structures and related methods

Reacted conductive gate electrodes

BRAITHWAITE GLYN

RF circuits including transistors having strained material layers

LANGDO THOMAS A

Methods of forming strained-semiconductor-on-insulator device structures