Inventor
FITZGERALD EUGENE A
US118 patents
⚠️ This page may combine multiple inventors who share the name “FITZGERALD EUGENE A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
AMBERWAVE SYSTEMS CORP
27 patentsUS7420201B2Sep 2, 2008
Strained-semiconductor-on-insulator device structures with elevated source/drain regions
AMBERWAVE SYSTEMS CORP80 citations99
US7074623B2Jul 11, 2006
Methods of forming strained-semiconductor-on-insulator finFET device structures
AMBERWAVE SYSTEMS CORP226 citations99
US6995430B2Feb 7, 2006
Strained-semiconductor-on-insulator device structures
AMBERWAVE SYSTEMS CORP485 citations99
US6703688B1Mar 9, 2004
Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP131 citations99
US6593191B2Jul 15, 2003
Buried channel strained silicon FET using a supply layer created through ion implantation
AMBERWAVE SYSTEMS CORP134 citations99
US6583015B2Jun 24, 2003
Gate technology for strained surface channel and strained buried channel MOSFET devices
AMBERWAVE SYSTEMS CORP152 citations99
US6555839B2Apr 29, 2003
Buried channel strained silicon FET using a supply layer created through ion implantation
AMBERWAVE SYSTEMS CORP259 citations99
US7109516B2Sep 19, 2006
Strained-semiconductor-on-insulator finFET device structures
AMBERWAVE SYSTEMS CORP100 citations98
US6703144B2Mar 9, 2004
Heterointegration of materials using deposition and bonding
AMBERWAVE SYSTEMS CORP98 citations98
US6680495B2Jan 20, 2004
Silicon wafer with embedded optoelectronic material for monolithic OEIC
AMBERWAVE SYSTEMS CORP81 citations98
US6677192B1Jan 13, 2004
Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP113 citations98
US6646322B2Nov 11, 2003
Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP92 citations98
US6602613B1Aug 5, 2003
Heterointegration of materials using deposition and bonding
AMBERWAVE SYSTEMS CORP82 citations98
US6593641B1Jul 15, 2003
Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP96 citations98
US7256142B2Aug 14, 2007
Relaxed SiGe platform for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP53 citations96
US7138310B2Nov 21, 2006
Semiconductor devices having strained dual channel layers
AMBERWAVE SYSTEMS CORP60 citations96
US6881632B2Apr 19, 2005
Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS
AMBERWAVE SYSTEMS CORP116 citations96
US6518644B2Feb 11, 2003
Low threading dislocation density relaxed mismatched epilayers without high temperature growth
AMBERWAVE SYSTEMS CORP39 citations96
US6503773B2Jan 7, 2003
Low threading dislocation density relaxed mismatched epilayers without high temperature growth
AMBERWAVE SYSTEMS CORP71 citations96
US6649480B2Nov 18, 2003
Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
AMBERWAVE SYSTEMS CORP91 citations95
US7588994B2Sep 15, 2009
Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain
AMBERWAVE SYSTEMS CORP17 citations93
US7297612B2Nov 20, 2007
Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes
AMBERWAVE SYSTEMS CORP16 citations93
US7259388B2Aug 21, 2007
Strained-semiconductor-on-insulator device structures
AMBERWAVE SYSTEMS CORP18 citations93
US6969875B2Nov 29, 2005
Buried channel strained silicon FET using a supply layer created through ion implantation
AMBERWAVE SYSTEMS CORP33 citations93
US6900103B2May 31, 2005
Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
AMBERWAVE SYSTEMS CORP21 citations93
US6838728B2Jan 4, 2005
Buried-channel devices and substrates for fabrication of semiconductor-based devices
AMBERWAVE SYSTEMS CORP21 citations93
US6750130B1Jun 15, 2004
Heterointegration of materials using deposition and bonding
AMBERWAVE SYSTEMS CORP48 citations93
MASSACHUSETTS INST TECHNOLOGY
17 patentsUS7535089B2May 19, 2009
Monolithically integrated light emitting devices
MASSACHUSETTS INST TECHNOLOGY277 citations99
US7250359B2Jul 31, 2007
Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
MASSACHUSETTS INST TECHNOLOGY96 citations99
US6291321B1Sep 18, 2001
Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
MASSACHUSETTS INST TECHNOLOGY213 citations99
US6107653AAug 22, 2000
Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
MASSACHUSETTS INST TECHNOLOGY271 citations99
US6737670B2May 18, 2004
Semiconductor substrate structure
MASSACHUSETTS INST TECHNOLOGY90 citations98
US6573126B2Jun 3, 2003
Process for producing semiconductor article using graded epitaxial growth
MASSACHUSETTS INST TECHNOLOGY209 citations98
US6039803AMar 21, 2000
Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon
MASSACHUSETTS INST TECHNOLOGY143 citations98
US7304336B2Dec 4, 2007
FinFET structure and method to make the same
MASSACHUSETTS INST TECHNOLOGY59 citations97
US6940089B2Sep 6, 2005
Semiconductor device structure
MASSACHUSETTS INST TECHNOLOGY62 citations96
US6876010B1Apr 5, 2005
Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization
MASSACHUSETTS INST TECHNOLOGY41 citations96
US6730551B2May 4, 2004
Formation of planar strained layers
MASSACHUSETTS INST TECHNOLOGY93 citations96
US6521041B2Feb 18, 2003
Etch stop layer system
MASSACHUSETTS INST TECHNOLOGY135 citations96
US6232138B1May 15, 2001
Relaxed InxGa(1-x)as buffers
MASSACHUSETTS INST TECHNOLOGY107 citations96
US6921914B2Jul 26, 2005
Process for producing semiconductor article using graded epitaxial growth
MASSACHUSETTS INST TECHNOLOGY49 citations95
US7202124B2Apr 10, 2007
Strained gettering layers for semiconductor processes
MASSACHUSETTS INST TECHNOLOGY56 citations94
US6689211B1Feb 10, 2004
Etch stop layer system
MASSACHUSETTS INST TECHNOLOGY86 citations94
US7705370B2Apr 27, 2010
Monolithically integrated photodetectors
MASSACHUSETTS INST TECHNOLOGY16 citations93
TAIWAN SEMICONDUCTOR MFG
4 patentsUS9064930B2Jun 23, 2015
Methods for forming semiconductor device structures
TAIWAN SEMICONDUCTOR MFG7 citations93
US8026534B2Sep 27, 2011
III-V semiconductor device structures
TAIWAN SEMICONDUCTOR MFG10 citations93
US7838392B2Nov 23, 2010
Methods for forming III-V semiconductor device structures
TAIWAN SEMICONDUCTOR MFG17 citations93
US7776697B2Aug 17, 2010
Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
TAIWAN SEMICONDUCTOR MFG9 citations93
MASACHUSETTS INST OF TECHNOLOG
1 patentAMBERWAVE SYSTEMS CORPROATION
1 patentShowing the top 50 of 118 patents by PatentIndex Score.