Inventor

ANDERSON BRENT A

US488 patents

⚠️ This page may combine multiple inventors who share the name “ANDERSON BRENT A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ANDERSON BRENT A

IBM

Vertical field effect transistors

Substrate backgate for trigate FET

Multiple-gate device with floating back gate

Low capacitance junction-isolation for bulk FinFET technology

Four-bit FinFET NVRAM memory device

Planar substrate devices integrated with finfets and method of manufacture

FinFET SRAM cell with chevron FinFET logic

Ultra dense vertical transport FET circuits

Vertical transistor fabrication and devices

Semiconductor structures with pair(s) of vertical field effect transistors, each pair having a shared source/drain region and methods of forming the structures

Dense pitch bulk FinFET process by selective EPI and etch

Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure

Graphene-based transistor

Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure

Field effect transistor with raised source/drain fin straps

FinFET with low gate capacitance and low extrinsic resistance

High mobility plane CMOS SOI

FinFETs with long gate length at high density

Skip via for metal interconnects

Vertical transport fin field effect transistor with asymmetric channel profile

Reduced tip-to-tip and via pitch at line end

High density vertical field effect transistor multiplexer

Self-aligned shallow trench isolation and doping for vertical fin transistors

Bottom source/drain silicidation for vertical field-effect transistor (FET)

Vertical transistors with merged active area regions

Methods of forming field effect transistors using a gate cut process following final gate formation

3D vertical FET with top and bottom gate contacts

Silicidation of bottom source/drain sheet using pinch-off sacrificial spacer process

Vertical field effect transistors

Hybrid circuit including a tunnel field-effect transistor

Vertical field effect transistors

Integrating a planar field effect transistor (FET) with a vertical FET

Replacement gate structures and methods of manufacturing

Gate-all-around field effect transistor structures and methods

Method of forming a multi-fin multi-gate field effect transistor with tailored drive current

Semiconducting device having graphene channel

Multi-fin multi-gate field effect transistor with tailored drive current

Method of forming a dual-plane complementary metal oxide semiconductor

Field effect transistor with raised source/drain fin straps

Air-gap insulated interconnections

Low-capacitance contact for long gate-length devices with small contacted pitch

SRAM cell

Double gate isolation

Planar substrate devices integrated with FinFETs and method of manufacture

ANDERSON BRENT A

Isolation structures for global shutter imager pixel, methods of manufacture and design structures

Integrated circuit and a method using integrated process steps to form deep trench isolation structures and deep trench capacitor structures for the integrated circuit

Confection

Graphene-based transistor

GLOBALFOUNDRIES INC

Damascene wires with top via structures

MARS INC

Confection