Inventor
RADU IONUT
FR45 patents
⚠️ This page may combine multiple inventors who share the name “RADU IONUT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
32 patentsUS11711065B2Jul 25, 2023
Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device
SOITEC SILICON ON INSULATOR5 citations85
US9165945B1Oct 20, 2015
Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures
SOITEC SILICON ON INSULATOR8 citations84
US9041214B2May 26, 2015
Bonded processed semiconductor structures and carriers
SOITEC SILICON ON INSULATOR8 citations84
US8866305B2Oct 21, 2014
Methods of forming bonded semiconductor structures
SOITEC SILICON ON INSULATOR12 citations84
US11637542B2Apr 25, 2023
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR1 citations73
US10924081B2Feb 16, 2021
Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device
SOITEC SILICON ON INSULATOR1 citations73
US10826459B2Nov 3, 2020
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR2 citations73
US10608610B2Mar 31, 2020
Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device
SOITEC SILICON ON INSULATOR3 citations73
US9553014B2Jan 24, 2017
Bonded processed semiconductor structures and carriers
SOITEC SILICON ON INSULATOR2 citations73
US11367650B2Jun 21, 2022
Structures for radiofrequency applications and related methods
SOITEC SILICON ON INSULATOR3 citations72
US10943815B2Mar 9, 2021
Structure for radiofrequency applications
SOITEC SILICON ON INSULATOR2 citations72
US9138980B2Sep 22, 2015
Apparatus for manufacturing semiconductor devices
SOITEC SILICON ON INSULATOR3 citations63
US12316298B2May 27, 2025
Surface acoustic wave device including transducer in dielectric between a piezoelectric material and a substrate
SOITEC SILICON ON INSULATOR0 citations62
US12165900B2Dec 10, 2024
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US12143093B2Nov 12, 2024
Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device
SOITEC SILICON ON INSULATOR0 citations62
US12101080B2Sep 24, 2024
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR0 citations62
US11923239B2Mar 5, 2024
Structures for radiofrequency applications and related methods
SOITEC SILICON ON INSULATOR0 citations62
US11742233B2Aug 29, 2023
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US11652464B2May 16, 2023
Surface acoustic wave device and associated production method
SOITEC SILICON ON INSULATOR0 citations62
US11600766B2Mar 7, 2023
Method for manufacturing a monocrystalline piezoelectric layer
SOITEC SILICON ON INSULATOR1 citations62
US11595020B2Feb 28, 2023
Heterostructure and method of fabrication
SOITEC SILICON ON INSULATOR0 citations62
US10910250B2Feb 2, 2021
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US12588250B2Mar 24, 2026
NCFET transistor comprising a semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR0 citations58
US11205702B2Dec 21, 2021
Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit
SOITEC SILICON ON INSULATOR0 citations52
US10276492B2Apr 30, 2019
Method for fabricating semiconductor structures including a high resistivity layer, and related semiconductor structures
SOITEC SILICON ON INSULATOR0 citations52
US11088016B2Aug 10, 2021
Method for locating devices
SOITEC SILICON ON INSULATOR0 citations50
US9905531B2Feb 27, 2018
Method for producing composite structure with metal/metal bonding
SOITEC SILICON ON INSULATOR1 citations50
US12320031B2Jun 3, 2025
Method for manufacturing a composite structure comprising a thin layer made of monocrystalline SiC on a carrier substrate made of SiC
SOITEC SILICON ON INSULATOR0 citations49
US12198983B2Jan 14, 2025
Method for producing a composite structure comprising a thin layer of monocrystalline sic on a carrier substrate of polycrystalline SiC
SOITEC SILICON ON INSULATOR0 citations49
US8841742B2Sep 23, 2014
Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods
SOITEC SILICON ON INSULATOR0 citations42
US9548237B2Jan 17, 2017
Method for transferring a layer comprising a compressive stress layer and related structures
SOITEC SILICON ON INSULATOR0 citations41
US9659777B2May 23, 2017
Process for stabilizing a bonding interface, located within a structure which comprises an oxide layer and structure obtained
SOITEC SILICON ON INSULATOR0 citations35
SADAKA MARIAM
6 patentsUS8716105B2May 6, 2014
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods
SADAKA MARIAM219 citations99
US8501537B2Aug 6, 2013
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods
SADAKA MARIAM221 citations98
US8461017B2Jun 11, 2013
Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region
SADAKA MARIAM27 citations92
US8673733B2Mar 18, 2014
Methods of transferring layers of material in 3D integration processes and related structures and devices
SADAKA MARIAM10 citations84
US8481406B2Jul 9, 2013
Methods of forming bonded semiconductor structures
SADAKA MARIAM7 citations84
US9136134B2Sep 15, 2015
Methods of providing thin layers of crystalline semiconductor material, and related structures and devices
SADAKA MARIAM0 citations42
RADU IONUT
3 patentsUS8993461B2Mar 31, 2015
Method for curing defects in a semiconductor layer
RADU IONUT4 citations63
US8263475B2Sep 11, 2012
Method for manufacturing heterostructures
RADU IONUT4 citations60
US9087767B2Jul 21, 2015
Process for manufacturing a semiconductor structure comprising a functionalized layer on a support substrate
RADU IONUT0 citations40