Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods

Abstract

Methods of transferring a layer of semiconductor material from a first donor structure to a second structure include forming recesses in the donor structure, implanting ions into the donor structure to form a generally planar, inhomogeneous weakened zone therein, and providing material within the recesses. The first donor structure may be bonded to a second structure, and the first donor structure may be fractured along the generally planar weakened zone, leaving the layer of semiconductor material bonded to the second structure. Semiconductor devices may be fabricated by forming active device structures on the transferred layer of semiconductor material. Semiconductor structures are fabricated using the described methods.

What is claimed is: 
     
       1. A method of transferring a layer of semiconductor material from a first donor structure to a second structure, comprising:
 forming recesses extending a distance into a first donor structure from a surface of the first donor structure; 
 implanting ions into the first donor structure to form a generally planar weakened zone within the first donor structure defined by the implanted ions, the generally planar weakened zone separating the layer of semiconductor material from a remainder of the first donor structure, the recesses extending at least partially through the layer of semiconductor material, the generally planar weakened zone having at least one characteristic that varies within the generally planar weakened zone in at least one direction parallel to the generally planar weakened zone; 
 providing a material within the recesses; 
 bonding the first donor structure to the second structure; and 
 fracturing the first donor structure along the generally planar weakened zone and leaving the layer of semiconductor material bonded to the second structure. 
 
     
     
       2. The method of  claim 1 , wherein at least one of a concentration of the implanted ions and an elemental composition of the implanted ions varies across the generally planar weakened zone in at least one direction parallel to the generally planar weakened zone. 
     
     
       3. The method of  claim 1 , further comprising selecting the material within the recesses to comprise a material exhibiting a first average coefficient of thermal expansion over a range of temperatures extending from about 0° C. to about 400° C. greater than a second average coefficient of thermal expansion exhibited by the semiconductor material of the layer of semiconductor material over the range of temperatures extending from about 0° C. to about 400° C. 
     
     
       4. The method of  claim 1 , further comprising selecting the material within the recesses to comprise a material exhibiting a modulus of elasticity of at least about 110% of a modulus of elasticity of the first donor structure. 
     
     
       5. The method of  claim 1 , further comprising selecting the material within the recesses to comprise at least one of an oxide, a nitride, an oxynitride, and silicon. 
     
     
       6. The method of  claim 1 , further comprising selecting the material within the recesses to comprise a polymer. 
     
     
       7. The method of  claim 6 , further comprising selecting the polymer to comprise at least one of a benzocyclobutene-based polymer and an epoxy-based polymer. 
     
     
       8. The method of  claim 1 , further comprising selecting the material within the recesses to comprise a material having an amorphous or polycrystalline microstructure. 
     
     
       9. The method of  claim 1 , further comprising depositing a patterned mask over the surface of the first donor structure prior to forming the recesses, the patterned mask having apertures extending through the patterned mask over a first plurality of regions of the layer of semiconductor material, the patterned mask covering a second plurality of regions of the layer of semiconductor material. 
     
     
       10. The method of  claim 9 , wherein forming the recesses comprises etching the layer of semiconductor material through the apertures extending through the patterned mask. 
     
     
       11. The method of  claim 10 , wherein implanting ions into the first donor structure comprises implanting ions into the first donor structure through the apertures extending through the patterned mask. 
     
     
       12. The method of  claim 9 , wherein implanting ions into the first donor structure to form the generally planar weakened zone comprises implanting a relatively higher concentration of ions into the first plurality of regions of the layer of semiconductor material relative to a concentration of ions implanted into the second plurality of regions of the layer of semiconductor material. 
     
     
       13. The method of  claim 12 , wherein implanting ions into the first donor structure comprises at least substantially preventing implantation of ions into the second plurality of regions of the layer of semiconductor material. 
     
     
       14. The method of  claim 9 , further comprising:
 selecting the first plurality of regions of the layer of semiconductor material to comprise inactive regions of the layer of semiconductor material; and 
 selecting the second plurality of regions of the layer of semiconductor material to comprise active regions of the layer of semiconductor material. 
 
     
     
       15. The method of  claim 1 , wherein implanting the ions into the first donor structure comprises implanting the ions into the first donor structure through apertures in a patterned mask. 
     
     
       16. The method of  claim 1 , further comprising forming spacer structures on lateral sidewalls within the recesses prior to implanting the ions into the first donor structure. 
     
     
       17. The method of  claim 1 , wherein implanting the ions into the first donor structure comprises:
 performing one ion implantation process to implant a first quantity of ions into the first donor structure at a substantially homogeneous concentration across the first donor structure within the generally planar weakened zone; and 
 performing another ion implantation process to implant a second quantity of ions into the first donor structure at a varying concentration across the first donor structure within the generally planar weakened zone. 
 
     
     
       18. The method of  claim 1 , further comprising selecting the first donor structure to comprise a semiconductor-on-insulator substrate. 
     
     
       19. The method of  claim 1 , further comprising forming at least one ion confinement layer in the first donor structure prior to implanting the ions into the first donor structure to form the generally planar weakened zone. 
     
     
       20. A method of fabricating a semiconductor device, comprising:
 transferring a layer of semiconductor material from a first donor structure to a second structure, comprising:
 forming recesses extending a distance into a first donor structure from a surface of the first donor structure; 
 implanting ions into the first donor structure to form a generally planar weakened zone within the first donor structure defined by the implanted ions, the generally planar weakened zone separating the layer of semiconductor material from a remainder of the first donor structure, the recesses extending at least partially through the layer of semiconductor material, the generally planar weakened zone having at least one characteristic that varies within the generally planar weakened zone in at least one direction parallel to the generally planar weakened zone; 
 providing a material within the recesses; 
 bonding the first donor structure to the second structure; and 
 
 fracturing the first donor structure along the generally planar weakened zone and leaving the layer of semiconductor material bonded to the second structure; and 
 fabricating a plurality of active device structures on the transferred layer of semiconductor material. 
 
     
     
       21. The method of  claim 20 , wherein at least one of a concentration of the implanted ions and an elemental composition of the implanted ions varies across the generally planar weakened zone in at least one direction parallel to the generally planar weakened zone. 
     
     
       22. The method of  claim 20 , further comprising selecting the material within the recesses to comprise a material exhibiting a first average coefficient of thermal expansion over a range of temperatures extending from about 0° C. to about 400° C. greater than a second average coefficient of thermal expansion exhibited by the semiconductor material of the layer of semiconductor material over the range of temperatures extending from about 0° C. to about 400° C. 
     
     
       23. The method of  claim 20 , further comprising selecting the material within the recesses to comprise a material exhibiting a modulus of elasticity of at least about 110% of a modulus of elasticity of the first donor structure. 
     
     
       24. The method of  claim 20 , further comprising depositing a patterned mask over the surface of the first donor structure prior to forming the recesses, the patterned mask having apertures extending through the patterned mask over a first plurality of regions of the layer of semiconductor material, the patterned mask covering a second plurality of regions of the layer of semiconductor material. 
     
     
       25. The method of  claim 24 , wherein forming the recesses comprises etching the layer of semiconductor material through the apertures extending through the patterned mask. 
     
     
       26. The method of  claim 25 , wherein implanting ions into the first donor structure comprises implanting ions into the first donor structure through the apertures extending through the patterned mask. 
     
     
       27. The method of  claim 24 , wherein implanting ions into the first donor structure to form the generally planar weakened zone comprises implanting a relatively higher concentration of ions into the first plurality of regions of the layer of semiconductor material relative to a concentration of ions implanted into the second plurality of regions of the layer of semiconductor material. 
     
     
       28. The method of  claim 27 , further comprising:
 selecting the first plurality of regions of the layer of semiconductor material to comprise inactive regions of the layer of semiconductor material; and 
 selecting the second plurality of regions of the layer of semiconductor material to comprise active regions of the layer of semiconductor material. 
 
     
     
       29. The method of  claim 20 , further comprising forming spacer structures on lateral sidewalls within the recesses prior to implanting the ions into the first donor structure. 
     
     
       30. A semiconductor structure, comprising:
 a first donor structure having recesses extending a distance into a first donor structure from a surface of the first donor structure and material within in the recesses, the first donor structure having a generally planar weakened zone therein defined by implanted ions within the first donor structure along the generally planar weakened zone, the generally planar weakened zone separating a layer of semiconductor material structure from a remainder of the first donor structure, the generally planar weakened zone having at least one characteristic that varies within the generally planar weakened zone in at least one direction parallel to the generally planar weakened zone; and 
 a second structure bonded to the layer of semiconductor material of the first donor structure. 
 
     
     
       31. The semiconductor structure of  claim 30 , wherein at least one of a concentration of the implanted ions and an elemental composition of the implanted ions varies across the generally planar weakened zone in at least one direction parallel to the generally plana weakened zone. 
     
     
       32. The semiconductor structure of  claim 30 , wherein the material within the recesses exhibits a first average coefficient of thermal expansion over a range of temperature; extending from about 0° C. to about 400° C. greater than a second average coefficient of thermal expansion exhibited by the semiconductor material of the layer of semiconductor material over the range of temperatures extending from about 0° C. to about 400° C. 
     
     
       33. The semiconductor structure of  claim 30 , wherein the material within the recesses comprises a material exhibiting a modulus of elasticity of at least about 110% of a modulus of elasticity of the first donor structure. 
     
     
       34. The semiconductor structure of  claim 30 , wherein the material within the recesses comprises at least one of an oxide, a nitride, an oxynitride, and silicon. 
     
     
       35. The semiconductor structure of  claim 30 , wherein the material within the recesses comprises a polymer. 
     
     
       36. The semiconductor structure of  claim 35 , wherein the polymer comprises at least one of a benzocyclobutene-based polymer and an epoxy-based polymer. 
     
     
       37. The semiconductor structure of  claim 30 , wherein the material within the recesses comprises a material having an amorphous or polycrystalline microstructure. 
     
     
       38. The semiconductor structure of  claim 30 , wherein the layer of semiconductor material comprises a first plurality of regions and a second plurality of regions, the recesses being formed in the first plurality of regions of the layer of semiconductor material, the first plurality of regions having a relatively higher concentration of implanted ions therein relative to a concentration of implanted ions within the second plurality of regions of the layer of semiconductor material. 
     
     
       39. The semiconductor structure of  claim 38 , wherein the regions of the second plurality of regions of the layer of semiconductor material are at least substantially free of implanted ions. 
     
     
       40. The semiconductor structure of  claim 38 , wherein:
 the first plurality of regions of the layer of semiconductor material comprise inactive regions of the layer of semiconductor material; and 
 the second plurality of regions of the layer of semiconductor material comprise active regions of the layer of semiconductor material. 
 
     
     
       41. The semiconductor structure of  claim 30 , further comprising spacer structures on lateral sidewalls within the recesses. 
     
     
       42. The semiconductor structure of  claim 30 , wherein the first donor structure comprises a semiconductor-on-insulator substrate.