Inventor
SADAKA MARIAM
US39 patents
⚠️ This page may combine multiple inventors who share the name “SADAKA MARIAM”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
17 patentsUS9293448B2Mar 22, 2016
Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates
SOITEC SILICON ON INSULATOR9 citations84
US9219150B1Dec 22, 2015
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
SOITEC SILICON ON INSULATOR9 citations84
US9165945B1Oct 20, 2015
Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures
SOITEC SILICON ON INSULATOR8 citations84
US9041214B2May 26, 2015
Bonded processed semiconductor structures and carriers
SOITEC SILICON ON INSULATOR8 citations84
US8866305B2Oct 21, 2014
Methods of forming bonded semiconductor structures
SOITEC SILICON ON INSULATOR12 citations84
US8637995B2Jan 28, 2014
Bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate
SOITEC SILICON ON INSULATOR9 citations84
US9818874B2Nov 14, 2017
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
SOITEC SILICON ON INSULATOR2 citations73
US9553014B2Jan 24, 2017
Bonded processed semiconductor structures and carriers
SOITEC SILICON ON INSULATOR2 citations73
US12344524B2Jul 1, 2025
Methods of fabricating semiconductor structures including cavities filled with a sacrificial material
SOITEC SILICON ON INSULATOR0 citations62
US9391011B2Jul 12, 2016
Semiconductor structures including fluidic microchannels for cooling and related methods
SOITEC SILICON ON INSULATOR0 citations52
US9349865B2May 24, 2016
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
SOITEC SILICON ON INSULATOR0 citations52
US10703627B2Jul 7, 2020
Methods of fabricating semiconductor structures including cavities filled with a sacrificial material
SOITEC SILICON ON INSULATOR0 citations51
US9728458B2Aug 8, 2017
Methods for fabrication of semiconductor structures using laser lift-off process, and related semiconductor structures
SOITEC SILICON ON INSULATOR1 citations51
US9716164B2Jul 25, 2017
Methods of forming III-V semiconductor structures using multiple substrates, and semiconductor devices fabricated using such methods
SOITEC SILICON ON INSULATOR0 citations42
US8841742B2Sep 23, 2014
Low temperature layer transfer process using donor structure with material in recesses in transfer layer, semiconductor structures fabricated using such methods
SOITEC SILICON ON INSULATOR0 citations42
US9511996B2Dec 6, 2016
Methods of forming semiconductor structures including MEMS devices and integrated circuits on common sides of substrates, and related structures and devices
SOITEC SILICON ON INSULATOR0 citations40
US9481566B2Nov 1, 2016
Methods of forming semiconductor structures including MEMS devices and integrated circuits on opposing sides of substrates, and related structures and devices
SOITEC SILICON ON INSULATOR0 citations40
SADAKA MARIAM
15 patentsUS8716105B2May 6, 2014
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods
SADAKA MARIAM219 citations99
US8697493B2Apr 15, 2014
Bonding surfaces for direct bonding of semiconductor structures
SADAKA MARIAM225 citations99
US8501537B2Aug 6, 2013
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods
SADAKA MARIAM221 citations98
US8461017B2Jun 11, 2013
Methods of forming bonded semiconductor structures using a temporary carrier having a weakened ion implant region for subsequent separation along the weakened region
SADAKA MARIAM27 citations92
US9245836B2Jan 26, 2016
Interposers including fluidic microchannels and related structures and methods
SADAKA MARIAM8 citations84
US8970045B2Mar 3, 2015
Methods for fabrication of semiconductor structures including interposers with conductive vias, and related structures and devices
SADAKA MARIAM7 citations84
US8673733B2Mar 18, 2014
Methods of transferring layers of material in 3D integration processes and related structures and devices
SADAKA MARIAM10 citations84
US8481406B2Jul 9, 2013
Methods of forming bonded semiconductor structures
SADAKA MARIAM7 citations84
US8338294B2Dec 25, 2012
Methods of forming bonded semiconductor structures including two or more processed semiconductor structures carried by a common substrate, and semiconductor structures formed by such methods
SADAKA MARIAM8 citations84
US8890299B2Nov 18, 2014
Bonded semiconductor structures and methods of forming same
SADAKA MARIAM4 citations66
US8778773B2Jul 15, 2014
Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods
SADAKA MARIAM3 citations63
US8980688B2Mar 17, 2015
Semiconductor structures including fluidic microchannels for cooling and related methods
SADAKA MARIAM0 citations52
US9136134B2Sep 15, 2015
Methods of providing thin layers of crystalline semiconductor material, and related structures and devices
SADAKA MARIAM0 citations42
US8617925B2Dec 31, 2013
Methods of forming bonded semiconductor structures in 3D integration processes using recoverable substrates, and bonded semiconductor structures formed by such methods
SADAKA MARIAM0 citations42
US9034727B2May 19, 2015
Methods and structures for forming integrated semiconductor structures
SADAKA MARIAM0 citations35
NGUYEN BICH-YEN
2 patentsUS8842945B2Sep 23, 2014
Methods of forming three dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates
NGUYEN BICH-YEN16 citations92
US8728863B2May 20, 2014
Methods of forming bonded semiconductor structures including interconnect layers having one or more of electrical, optical, and fluidic interconnects therein, and bonded semiconductor structures formed using such methods
NGUYEN BICH-YEN2 citations62