Inventor
CHIU YOU-MING
TW15 patents
⚠️ This page may combine multiple inventors who share the name “CHIU YOU-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VIA TECH INC
13 patentsUS6687320B1Feb 3, 2004
Phase lock loop (PLL) clock generator with programmable skew and frequency
VIA TECH INC70 citations95
US6020774AFeb 1, 2000
Gated clock tree synthesis method for the logic design
VIA TECH INC52 citations92
US6564360B2May 13, 2003
Static timing analysis method for a circuit using generated clock
VIA TECH INC13 citations83
US7047508B2May 16, 2006
Method for performing multi-clock static timing analysis
VIA TECH INC8 citations73
US6269430B1Jul 31, 2001
Method for controlling a process of writing data sent by a central processing unit to a memory by using a central processing unit interface
VIA TECH INC3 citations63
US6968525B2Nov 22, 2005
Implementing method for buffering devices
VIA TECH INC2 citations62
US6826637B2Nov 30, 2004
Implementing for buffering devices in circuit layout to ensure same arriving time for clock signal from source root to output bonding pads
VIA TECH INC2 citations62
US6711627B2Mar 23, 2004
Method for scheduling execution sequence of read and write operations
VIA TECH INC4 citations62
US6603828B1Aug 5, 2003
Chipset with clock signal converting
VIA TECH INC3 citations62
US7007263B2Feb 28, 2006
Design flow method for integrated circuits
VIA TECH INC6 citations61
US6898684B2May 24, 2005
Control chip with multiple-layer defer queue
VIA TECH INC0 citations40
US6336198B1Jan 1, 2002
Chip testing system
VIA TECH INC0 citations34
US6950999B2Sep 27, 2005
Circuitry cross-talk analysis with consideration of signal transitions
VIA TECH INC0 citations33