Inventor
WELLS STEVEN E
US43 patents
⚠️ This page may combine multiple inventors who share the name “WELLS STEVEN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
40 patentsUS5581723ADec 3, 1996
Method and apparatus for retaining flash block structure data during erase operations in a flash EEPROM memory array
INTEL CORP201 citations99
US5515317AMay 7, 1996
Addressing modes for a dynamic single bit per cell to multiple bit per cell memory
INTEL CORP129 citations99
US5357475AOct 18, 1994
Method for detaching sectors in a flash EEPROM memory array
INTEL CORP207 citations99
US5341339AAug 23, 1994
Method for wear leveling in a flash EEPROM memory
INTEL CORP469 citations99
US6014755AJan 11, 2000
Method of managing defects in flash disk memories
INTEL CORP128 citations98
US5740349AApr 14, 1998
Method and apparatus for reliably storing defect information in flash disk memories
INTEL CORP127 citations98
US5577194ANov 19, 1996
Method of managing defects in flash disk memories
INTEL CORP110 citations98
US5473753ADec 5, 1995
Method of managing defects in flash disk memories
INTEL CORP148 citations98
US5341330AAug 23, 1994
Method for writing to a flash memory array during erase suspend intervals
INTEL CORP206 citations98
US6687721B1Feb 3, 2004
Random number generator with entropy accumulation
INTEL CORP89 citations97
US6009497ADec 28, 1999
Method and apparatus for updating flash memory resident firmware through a standard disk drive interface
INTEL CORP145 citations97
US5754817AMay 19, 1998
Execution in place of a file stored non-contiguously in a non-volatile memory
INTEL CORP119 citations97
US6687325B1Feb 3, 2004
Counter with non-uniform digit base
INTEL CORP46 citations96
US5574879ANov 12, 1996
Addressing modes for a dynamic single bit per cell to multiple bit per cell memory
INTEL CORP86 citations96
US5450363ASep 12, 1995
Gray coding for a multilevel cell memory system
INTEL CORP208 citations96
US5448577ASep 5, 1995
Method for reliably storing non-data fields in a flash EEPROM memory array
INTEL CORP79 citations96
US7350083B2Mar 25, 2008
Integrated circuit chip having firmware and hardware security primitive device(s)
INTEL CORP56 citations95
US5544119AAug 6, 1996
Method for assuring that an erase process for a memory array has been properly completed
INTEL CORP50 citations95
US5369616ANov 29, 1994
Method for assuring that an erase process for a memory array has been properly completed
INTEL CORP81 citations95
US7085341B2Aug 1, 2006
Counter with non-uniform digit base
INTEL CORP20 citations93
US6795837B1Sep 21, 2004
Programmable random bit source
INTEL CORP43 citations93
US6249562B1Jun 19, 2001
Method and system for implementing a digit counter optimized for flash memory
INTEL CORP49 citations93
US5416782AMay 16, 1995
Method and apparatus for improving data failure rate testing for memory arrays
INTEL CORP132 citations93
US5603036AFeb 11, 1997
Power management system for components used in battery powered applications
INTEL CORP37 citations92
US5265059ANov 23, 1993
Circuitry and method for discharging a drain of a cell of a non-volatile semiconductor memory
INTEL CORP44 citations92
US5249158ASep 28, 1993
Flash memory blocking architecture
INTEL CORP60 citations92
US6792438B1Sep 14, 2004
Secure hardware random number generator
INTEL CORP39 citations91
US6446019B1Sep 3, 2002
Method and apparatus for calibrating analog sensor measurement
INTEL CORP21 citations91
US5696977ADec 9, 1997
Power management system for components used in battery powered applications
INTEL CORP37 citations91
US5867721AFeb 2, 1999
Selecting an integrated circuit from different integrated circuit array configurations
INTEL CORP40 citations89
US7269614B2Sep 11, 2007
Secure hardware random number generator
INTEL CORP13 citations83
US6728893B1Apr 27, 2004
Power management system for a random number generator
INTEL CORP16 citations83
US6643374B1Nov 4, 2003
Duty cycle corrector for a random number generator
INTEL CORP13 citations83
US10185511B2Jan 22, 2019
Technologies for managing an operational characteristic of a solid state drive
INTEL CORP2 citations73
US9213400B2Dec 15, 2015
Apparatus and method to provide near zero power DEVSLP in SATA drives
INTEL CORP5 citations73
US5835933ANov 10, 1998
Method and apparatus for updating flash memory resident firmware through a standard disk drive interface
INTEL CORP14 citations72
US5295113AMar 15, 1994
Flash memory source inhibit generator
INTEL CORP7 citations66
US7177888B2Feb 13, 2007
Programmable random bit source
INTEL CORP4 citations63
US5455800AOct 3, 1995
Apparatus and a method for improving the program and erase performance of a flash EEPROM memory array
INTEL CORP6 citations63
US8874834B2Oct 28, 2014
Tracking a lifetime of write operations to a non-volatile memory storage
INTEL CORP2 citations57