Inventor

HSIAO CHENG-TAI

TW17 patents

⚠️ This page may combine multiple inventors who share the name “HSIAO CHENG-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSIAO CHENG-TAI

TAIWAN SEMICONDUCTOR MFG CO LTD

Techniques for MRAM MTJ top electrode connection

Structure and method to expose memory cells with different sizes

Wafer bonding process and structure

3D integrated circuit and methods of forming the same

MRAM MTJ top electrode connection

Structure and method to expose memory cells with different sizes

Memory device using an etch stop dielectric layer and methods for forming the same

Wafer bonding process and structure

3D integrated circuit and methods of forming the same

Conductive structure connection with interconnect structure

MRAM MTJ with directly coupled top electrode connection

Structure improving reliability of top electrode contact for resistance switching RAM having cells of varying height

Structure and method to expose memory cells with different sizes

Structure improving reliability of top electrode contact for resistance switching RAM having cells of varying height

Structure and method to expose memory cells with different sizes

Through via structure and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG

3D integrated circuit and methods of forming the same