Inventor
SUBBANNA SESHADRI
US35 patents
⚠️ This page may combine multiple inventors who share the name “SUBBANNA SESHADRI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
34 patentsUS5354707AOct 11, 1994
Method of making semiconductor quantum dot light emitting/detecting devices
IBM280 citations99
US5293050AMar 8, 1994
Semiconductor quantum dot light emitting/detecting devices
IBM333 citations99
US6635506B2Oct 21, 2003
Method of fabricating micro-electromechanical switches on CMOS compatible substrates
IBM155 citations98
US6661069B1Dec 9, 2003
Micro-electromechanical varactor with enhanced tuning range
IBM48 citations96
US6368484B1Apr 9, 2002
Selective plating process
IBM56 citations96
US6344125B1Feb 5, 2002
Pattern-sensitive electrolytic metal plating
IBM56 citations96
US5612255AMar 18, 1997
One dimensional silicon quantum wire devices and the method of manufacture thereof
IBM63 citations96
US5485032AJan 16, 1996
Antifuse element with electrical or optical programming
IBM61 citations96
US5807788ASep 15, 1998
Method for selective deposition of refractory metal and device formed thereby
IBM72 citations95
US5268324ADec 7, 1993
Modified silicon CMOS process having selectively deposited Si/SiGe FETS
IBM79 citations95
US5266504ANov 30, 1993
Low temperature emitter process for high performance bipolar devices
IBM53 citations95
US5194397AMar 16, 1993
Method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface
IBM76 citations95
US9643181B1May 9, 2017
Integrated microfluidics system
IBM28 citations94
US6696343B1Feb 24, 2004
Micro-electromechanical varactor with enhanced tuning range
IBM16 citations93
US6414371B1Jul 2, 2002
Process and structure for 50+ gigahertz transistor
IBM38 citations93
US6858532B2Feb 22, 2005
Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related tooling
IBM44 citations92
US6798029B2Sep 28, 2004
Method of fabricating micro-electromechanical switches on CMOS compatible substrates
IBM28 citations92
US6780695B1Aug 24, 2004
BiCMOS integration scheme with raised extrinsic base
IBM24 citations92
US6777302B1Aug 17, 2004
Nitride pedestal for raised extrinsic base HBT process
IBM27 citations92
US5789286AAug 4, 1998
Method of making a CMOS structure with FETS having isolated wells with merged depletions
IBM32 citations92
US5731619AMar 24, 1998
CMOS structure with FETS having isolated wells with merged depletions and methods of making same
IBM17 citations92
US5338698AAug 16, 1994
Method of fabricating an ultra-short channel field effect transistor
IBM45 citations92
US6800503B2Oct 5, 2004
MEMS encapsulated structure and method of making same
IBM38 citations89
US6472288B2Oct 29, 2002
Method of fabricating bipolar transistors with independent impurity profile on the same chip
IBM21 citations89
US7053460B2May 30, 2006
Multi-level RF passive device
IBM15 citations84
US6927476B2Aug 9, 2005
Bipolar device having shallow junction raised extrinsic base and method for making the same
IBM16 citations84
US6448124B1Sep 10, 2002
Method for epitaxial bipolar BiCMOS
IBM16 citations84
US6933186B2Aug 23, 2005
Method for BEOL resistor tolerance improvement using anodic oxidation
IBM7 citations74
US5294558AMar 15, 1994
Method of making double-self-aligned bipolar transistor structure
IBM15 citations74
US6429500B1Aug 6, 2002
Semiconductor pin diode for high frequency applications
IBM11 citations73
US6800921B1Oct 5, 2004
Method of fabricating a polysilicon capacitor utilizing fet and bipolar base polysilicon layers
IBM9 citations72
US6670228B2Dec 30, 2003
Method of fabricating a polysilicon capacitor utilizing FET and bipolar base polysilicon layers
IBM7 citations72
US6375859B1Apr 23, 2002
Process for resist clean up of metal structures on polyimide
IBM4 citations61
US6049131AApr 11, 2000
Device formed by selective deposition of refractory metal of less than 300 Angstroms of thickness
IBM1 citations51