Inventor

RACHMADY WILLY

US364 patents

⚠️ This page may combine multiple inventors who share the name “RACHMADY WILLY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RACHMADY WILLY

INTEL CORP

Transistor with improved tip profile and method of manufacture thereof

Replacement spacers for MOSFET fringe capacitance reduction and processes of making same

Integration methods to fabricate internal spacers for nanowire devices

Transistors with high concentration of boron doped germanium

Isolated Germanium nanowire on Silicon fin

Selective high-k dielectric film deposition for semiconductor device

Method of preparing active silicon regions for CMOS or other devices

Apparatus and method for selectively recessing spacers on multi-gate devices

Non-planar gate all-around device and method of fabrication thereof

Apparatus and methods for forming a modulation doped non-planar transistor

Transistor with improved tip profile and method of manufacture thereof

Metal gate structure and method of manufacturing same

Thin film transistors having U-shaped features

Forksheet transistor architectures

Backside contacts for semiconductor devices

Transistors with high concentration of germanium

Non-planar gate all-around device and method of fabrication thereof

Ge nano wire transistor with GaAs as the sacrificial layer

Indium-rich NMOS transistor channels

High-mobility semiconductor source/drain spacer

Semiconductor device having germanium active layer with underlying diffusion barrier layer

High mobility strained channels for fin-based NMOS transistors

Aspect ratio trapping (ART) for fabricating vertical semiconductor devices

Variable gate width for gate all-around transistors

Deep gate-all-around semiconductor device having germanium or group III-V active layer

CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture

Silicon and silicon germanium nanowire structures

Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation

Lattice mismatched hetero-epitaxial film

Stain compensation in transistors

Techniques for forming non-planar germanium quantum well devices

RACHMADY WILLY

Non-planar gate all-around device and method of fabrication thereof

Semiconductor devices with germanium-rich active layers and doped transition layers

Variable gate width for gate all-around transistors

Non-planar quantum well device having interfacial layer and method of forming same

Multi-gate device having a T-shaped gate structure

Substrate fins with different heights

Recessed workfunction metal in CMOS transistor gates

PILLARISETTY RAVI

Trench confined epitaxially grown device layer(s)

Non-planar germanium quantum well devices

Trench confined epitaxially grown device layer(s)

Contact techniques and configurations for reducing parasitic resistance in nanowire transistors

Non-planar germanium quantum well devices

Deep gate-all-around semiconductor device having germanium or group III-V active layer

KUHN KELIN J

Silicon and silicon germanium nanowire structures

Silicon and silicon germanium nanowire structures

RADOSAVLJEVIC MARKO

CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture

Conductivity improvements for III-V semiconductor devices

MURTHY ANAND S

Transistors with high concentration of boron doped germanium

KIM SEIYON

Integration methods to fabricate internal spacers for nanowire devices