Inventor

KAKUMU MASAKAZU

JP36 patents

⚠️ This page may combine multiple inventors who share the name “KAKUMU MASAKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KAKUMU MASAKAZU

UNISANTIS ELECT SINGAPORE PTE

Semiconductor memory device

Semiconductor memory device

Memory device using semiconductor element

Semiconductor-element-including memory device

Memory device using semiconductor element

Memory device using semiconductor element

Memory device using semiconductor element

Memory device with stacked body orthogonal to substrate and method using write and ease page refresh operations

Semiconductor device including memory element

Memory device including semiconductor element

Semiconductor-element-including memory device

Memory device using semiconductor element

Memory device with semiconductor elements

Semiconductor-element-including memory device

Semiconductor memory device

Semiconductor memory device

Memory device using semiconductor element

Memory device including semiconductor

Memory device with single-transistor DRAM cells with no capacitors, and memory cells stacked in the vertical direction using gate-all-around (GAA) technology

Memory device using semiconductor device

Semiconductor-element-including memory device

Semiconductor memory device and manufacturing method of semiconductor memory device

TOSHIBA KK

Method of manufacturing MOS-type semiconductor device having electrode structure capable of coping with short-channel effects

Method for forming contact portion in semiconductor integrated circuit devices

Method for manufacturing a semiconductor device having reduced resistance of diffusion layers and gate electrodes

MOS-type semiconductor device having electrode structure capable of coping with short-channel effect and manufacturing method thereof

Semiconductor device

Method for forming a sputtered metal film

Complementary semiconductor device using diamond thin film and the method of manufacturing this device

Semiconductor device having buried element isolation region

Semiconductor device FET with reduced energy level degeneration

Semiconductor integrated circuit device having double well structure

A method of manufacturing semiconductor elements-isolating silicon oxide layers

Method of increasing the thickness of a field oxide

Semiconductor device and a method for manufacturing the same

TOKYO SHIBAURA ELECTRIC CO

Method of manufacturing a FET