Inventor
HANNA STEPHEN
US40 patents
⚠️ This page may combine multiple inventors who share the name “HANNA STEPHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MICRON TECHNOLOGY INC
23 patentsUS10871907B2Dec 22, 2020
Sequential data optimized sub-regions in storage devices
MICRON TECHNOLOGY INC6 citations83
US11347659B2May 31, 2022
Low cost and low latency logical unit erase
MICRON TECHNOLOGY INC2 citations73
US11226894B2Jan 18, 2022
Host-based flash memory maintenance techniques
MICRON TECHNOLOGY INC3 citations73
US10970228B2Apr 6, 2021
Mapping table compression using a run length encoding algorithm
MICRON TECHNOLOGY INC2 citations73
US11294585B2Apr 5, 2022
Sequential data optimized sub-regions in storage devices
MICRON TECHNOLOGY INC3 citations72
US12547512B2Feb 10, 2026
Testing for memory devices using dedicated command and address channels
MICRON TECHNOLOGY INC0 citations62
US12455608B2Oct 28, 2025
Peak power management extensions to application-specific integrated circuits
MICRON TECHNOLOGY INC0 citations62
US12271317B2Apr 8, 2025
Creating high density logical to physical mapping
MICRON TECHNOLOGY INC0 citations62
US12124738B2Oct 22, 2024
Address verification at a memory system
MICRON TECHNOLOGY INC0 citations62
US12056518B2Aug 6, 2024
Notifying memory system of host events via modulated reset signals
MICRON TECHNOLOGY INC0 citations62
US11994951B2May 28, 2024
Device reset alert mechanism
MICRON TECHNOLOGY INC0 citations62
US11940926B2Mar 26, 2024
Creating high density logical to physical mapping
MICRON TECHNOLOGY INC0 citations62
US11809311B2Nov 7, 2023
Host-based flash memory maintenance techniques
MICRON TECHNOLOGY INC0 citations62
US11755214B2Sep 12, 2023
Sequential data optimized sub-regions in storage devices
MICRON TECHNOLOGY INC0 citations62
US11704256B2Jul 18, 2023
Facilitating sequential reads in memory sub-systems
MICRON TECHNOLOGY INC0 citations62
US11568953B2Jan 31, 2023
Electrical device with test interface
MICRON TECHNOLOGY INC0 citations62
US11520525B2Dec 6, 2022
Integrated pivot table in a logical-to-physical mapping having entries and subsets associated via a flag
MICRON TECHNOLOGY INC0 citations62
US11513835B2Nov 29, 2022
Notifying memory system of host events via modulated reset signals
MICRON TECHNOLOGY INC0 citations62
US11200179B2Dec 14, 2021
Facilitating sequential reads in memory sub-systems
MICRON TECHNOLOGY INC0 citations62
US10930366B2Feb 23, 2021
Storage device with test interface
MICRON TECHNOLOGY INC0 citations62
US12353723B2Jul 8, 2025
Low-power boot-up for memory systems
MICRON TECHNOLOGY INC0 citations52
US11775207B2Oct 3, 2023
Techniques to perform a write operation
MICRON TECHNOLOGY INC0 citations52
US11656673B2May 23, 2023
Managing reduced power memory operations
MICRON TECHNOLOGY INC0 citations52
SEAGATE TECHNOLOGY LLC
8 patentsUS9619321B1Apr 11, 2017
Internal copy-back with read-verify
SEAGATE TECHNOLOGY LLC197 citations99
US10140027B1Nov 27, 2018
Data transfers with adaptively adjusted polling times
SEAGATE TECHNOLOGY LLC11 citations84
US10229052B2Mar 12, 2019
Reverse map logging in physical media
SEAGATE TECHNOLOGY LLC7 citations83
US9905294B1Feb 27, 2018
Writing logically offset pages of data to N-level memory cells coupled to a common word line
SEAGATE TECHNOLOGY LLC9 citations83
US10353622B2Jul 16, 2019
Internal copy-back with read-verify
SEAGATE TECHNOLOGY LLC3 citations73
US10664168B2May 26, 2020
Data transfers with adaptively adjusted polling times
SEAGATE TECHNOLOGY LLC1 citations62
US10248330B2Apr 2, 2019
Data storage device with buffer tenure management
SEAGATE TECHNOLOGY LLC0 citations51
US10229000B2Mar 12, 2019
Erasure codes to prevent lower page corruption in flash memory
SEAGATE TECHNOLOGY LLC0 citations41
LODESTAR LICENSING GROUP LLC
5 patentsUS12547552B2Feb 10, 2026
Low cost and low latency logical unit erase
LODESTAR LICENSING GROUP LLC0 citations62
US12216943B2Feb 4, 2025
Integrated pivot table in a logical-to-physical mapping
LODESTAR LICENSING GROUP LLC0 citations62
US12135887B2Nov 5, 2024
Sequential data optimized sub-regions in storage devices
LODESTAR LICENSING GROUP LLC0 citations62
US11941300B2Mar 26, 2024
Integrated pivot table in a logical-to-physical mapping
LODESTAR LICENSING GROUP LLC0 citations62
US11815939B2Nov 14, 2023
Low cost and low latency logical unit erase
LODESTAR LICENSING GROUP LLC0 citations62