Inventor · disambiguated record
Edward Franklin Runnion
Also filed as: RUNNION EDWARD · RUNNION EDWARD F · RUNNION EDWARD FRANKLIN
14 granted patents·354 citations·filing 2002–2008
94Inventor score
Top patents by PatentIndex Score
14 records- 0194US7619932B2Algorithm for charge loss reduction and Vt distribution improvementSPANSION LLC·Filed 2007·Granted Nov 17, 2009·42 cites·25 claims
- 0293US6834012B1Memory device and methods of using negative gate stress to correct over-erased memory cellsADVANCED MICRO DEVICES INC·Filed 2004·Granted Dec 21, 2004·74 cites·23 claims
- 0392US6735114B1Method of improving dynamic reference tracking for flash memory unitADVANCED MICRO DEVICES INC·Filed 2003·Granted May 11, 2004·72 cites·18 claims
- 0484US7319615B1Ramp gate erase for dual bit flash memorySPANSION LLC·Filed 2006·Granted Jan 15, 2008·17 cites·15 claims
- 0582US6958272B2Pocket implant for complementary bit disturb improvement and charging improvement of SONOS memory cellADVANCED MICRO DEVICES INC·Filed 2004·Granted Oct 25, 2005·27 cites·23 claims
- 0680US6775187B1Method of programming a dual cell memory deviceADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 10, 2004·29 cites·19 claims
- 0779US6822909B1Method of controlling program threshold voltage distribution of a dual cell memory deviceADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 23, 2004·27 cites·36 claims
- 0873US7170796B1Methods and systems for reducing the threshold voltage distribution following a memory cell eraseSPANSION LLC·Filed 2005·Granted Jan 30, 2007·9 cites·20 claims
- 0969US6944057B1Method to obtain temperature independent program threshold voltage distribution using temperature dependent voltage referenceFASL LLC·Filed 2003·Granted Sep 13, 2005·16 cites·16 claims
- 1066US7561471B2Cycling improvement using higher erase biasSPANSION LLC·Filed 2007·Granted Jul 14, 2009·6 cites·34 claims
- 1165US6788583B2Pre-charge method for reading a non-volatile memory cellADVANCED MICRO DEVICES INC·Filed 2002·Granted Sep 7, 2004·14 cites·19 claims
- 1260US6906959B2Method and system for erasing a nitride memory deviceADVANCED MICRO DEVICES INC·Filed 2002·Granted Jun 14, 2005·9 cites·8 claims
- 1357US6771545B1Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell arrayADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 3, 2004·10 cites·18 claims
- 1451US7995386B2Applying negative gate voltage to wordlines adjacent to wordline associated with read or verify to reduce adjacent wordline disturbSPANSION LLC·Filed 2008·Granted Aug 9, 2011·2 cites·20 claims
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