Inventor

HUANG TAI-CHUN

TW137 patents

⚠️ This page may combine multiple inventors who share the name “HUANG TAI-CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUANG TAI-CHUN

TAIWAN SEMICONDUCTOR MFG CO LTD

System and method for supplying a precursor for an atomic layer deposition (ALD) process

FinFETs and methods of forming FinFETs

Semiconductor device, FinFET device and methods of forming the same

Forming isolation regions for separating fins and gate stacks

Dielectric spacer to prevent contacting shorting

FinFETs and methods of forming FinFETs

Semiconductor device and method

Semiconductor device structure with cap layer with top and bottom portions over gate electrode

FinFET structures and methods of forming the same

Forming isolation regions for separating fins and gate stacks

Calibration system for wavelength-division multiplexing, wavelength-division multiplexing system, and calibrating method for wavelength-division multiplexing

Multi-layer photo etching mask including organic and inorganic materials

Trench filling through reflowing filling material

FinFETs and methods of forming FinFETs

Dielectric spacer to prevent contacting shorting

FinFETs and methods of forming FinFETs

System and method for supplying a precursor for an atomic layer deposition (ALD) process

Semiconductor strips with undercuts and methods for forming the same

FinFETs and methods of forming the same

Conductor layout technique to reduce stress-induced void formations

Semiconductor structure

Multilayer masking layer and method of forming same

Masking layer with post treatment

Atomic layer deposition tool and method

Photoresist and method

Semiconductor device with isolation structure

TAIWAN SEMICONDUCTOR MFG

Conductor layout technique to reduce stress-induced void formations

Bonding pad and via structure design

Bump pad design for flip chip bumping

Structure and method for reinforcing a bond pad on a chip

Bond pad for flip chip package

Bonding pad metal layer geometry design

Fin deformation modulation

Semiconductor device fault detection system and method

Bond pad structure with stress-buffering layer capping interconnection metal layer

Bond pad structure for wire bonding

Non-repeated and non-uniform width seal ring structure

Semiconductor bonding pad structure

Semiconductor chip singulation method

Semiconductor device and method of forming vertical structure

Fin deformation modulation

Test patterns for measurement of effective vacancy diffusion area

Method and pattern for reducing interconnect failures

Integration film scheme for copper / low-k interconnect

ADVANCED SEMICONDUCTOR ENG

Ball grid array semiconductor package having improved heat dissipation efficiency, overall electrical performance and enhanced bonding capability

Semiconductor package with wire protection and method therefor

Strip of semiconductor package

HUANG TAI CHUN

Front face of a vehicle wheel

CHANG CHIA-WEI

Fin profile structure and method of making same

LU CHANG-SHEN

Dummy FinFET structure and method of making same