Inventor

Darmawikarta Kristof

US92 patents

⚠️ This page may combine multiple inventors who share the name “Darmawikarta Kristof”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Darmawikarta Kristof

INTEL CORP

Multi-chip package with high density interconnects

Inorganic-based embedded-die layers for modular semiconductive devices

Electromigration resistant and profile consistent contact arrays

Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

Inorganic interposer for multi-chip packaging

Electroless metal-defined thin pad first level interconnects for lithographically defined vias

Microelectronic device with embedded die substrate on interposer

Multi-chip package with high density interconnects

Electroless metal-defined thin pad first level interconnects for lithographically defined vias

In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same

Fabricating an RF filter on a semiconductor package using selective seeding

Integrated magnetic inductors for embedded-multi-die interconnect bridge substrates

Metal protected fan-out cavity

Device and method of very high density routing used with embedded multi-die interconnect bridge

Substrate with variable height conductive and dielectric elements

Thin film barrier seed metallization in magnetic-plugged through hole inductor

Lithographic cavity formation to enable EMIB bump pitch scaling

Electromigration resistant and profile consistent contact arrays

Method for forming embedded grounding planes on interconnect layers

Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layers

Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate

Photonic interconnect and components in glass

Multi-chip package with high density interconnects

Nested interposer with through-silicon via bridge die

Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging

Multi-chip package with high density interconnects

In-package RF waveguides as high bandwidth chip-to-chip interconnects and methods for using the same

Sacrificial dielectric for lithographic via formation to enable via scaling in high density interconnect packaging

Polarization defined zero misalignment vias for semiconductor packaging

Aluminum oxide for thermal management or adhesion

Integrated optical coupler

Substrate integrated thin film capacitors using amorphous high-k dielectrics

Glass substrates having signal shielding for use with semiconductor packages and related methods

Inorganic-based embedded-die layers for modular semiconductive devices

Coreless electronic substrates having embedded inductors

Magneto-optical Kerr effect interconnects for photonic packaging

Substrate embedded magnetic core inductors and method of making

Microelectronic device with embedded die substrate on interposer

Method to form high capacitance thin film capacitors (TFCs) as embedded passives in organic substrate packages

Microelectronic device with embedded die substrate on interposer

Patch accommodating embedded dies having different thicknesses

Substrate integrated thin film capacitors using amorphous high-k dielectrics

Inorganic-based embedded-die layers for modular semiconductive devices

Fabricating an RF filter on a semiconductor package using selective seeding

Package architecture utilizing photoimageable dielectric (PID) for reduced bump pitch

Dielectric for high density substrate interconnects

Substrate integrated thin film capacitors using amorphous high-k dielectrics

In-situ component fabrication of a highly efficient, high inductance air core inductor integrated into substrate packages

Substrate embedded magnetic core inductors and method of making

TAHOE RES LTD

Electromigration resistant and profile consistent contact arrays