Inventor

SHIH CHI-YUAN

TW61 patents

⚠️ This page may combine multiple inventors who share the name “SHIH CHI-YUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIH CHI-YUAN

TAIWAN SEMICONDUCTOR MFG CO LTD

Self-aligned passivation of active regions

Selective Fin-shaping process

Fin field-effect transistors having controlled fin height

Methods for forming STI regions in integrated circuits

System and method for test key characterizing wafer processing state

Passivation structure of fin field effect transistor

Semiconductor device and method

Fatigue-free bipolar loop treatment to reduce imprint effect in piezoelectric device

Fatigue-free bipolar loop treatment to reduce imprint effect in piezoelectric device

Methods for probing semiconductor fins through four-point probe and determining carrier concentrations

Passivated and faceted for fin field effect transistor

Passivated and faceted for fin field effect transistor

High speed optical receiver system

Fatigue-free bipolar loop treatment to reduce imprint effect in piezoelectric device

Titanium layer as getter layer for hydrogen in a MIM device

Integrated heater (and related method) to recover degraded piezoelectric device performance

Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device

Integrated heater (and related method) to recover degraded piezoelectric device performance

Forming STI regions to separate semiconductor Fins

Titanium layer as getter layer for hydrogen in a MIM device

Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device

Self-aligned passivation of active regions

Fin structure of semiconductor device

Self-aligned passivation of active regions

Reduction of electric field enhanced moisture penetration by metal shielding

Semiconductor device and method

Wavelength tuning in silicon photonics

Waveguide photodetector and method for forming the same

Passivated and faceted for fin field effect transistor

System and method for test key characterizing wafer processing state

Self-aligned passivation of active regions

Self-aligned dual-metal silicide and germanide formation

Contact structure of semiconductor device

Passivated and faceted fin field effect transistor

TAIWAN SEMICONDUCTOR MFG

Passivated and faceted for fin field effect transistor

Self-aligned dual-metal silicide and germanide formation

Contact structure of semiconductor device

Contact structure of semiconductor device

Calculating carrier concentrations in semiconductor Fins using probed resistance

Passivation structure of fin field effect transistor

WANN CLEMENT HSINGJEN

Selective fin-shaping process using plasma doping and etching for 3-dimensional transistor applications

Contact structure of semiconductor device

Fin field effect transistors and methods for fabricating the same

Method of forming fin field-effect transistors having controlled fin height

SHIH CHI-YUAN

Overlay alignment mark and method of detecting overlay alignment error using the mark

Structure of stacking scatterometry based overlay marks for marks footprint reduction

Integrated chromatography devices and systems for monitoring analytes in real time and methods for manufacturing the same

CALIFORNIA INST OF TECHN

On-chip temperature controlled liquid chromatography methods and devices

Resonance-induced sensitivity enhancement method for conductivity sensors

WU CHIH-JEN

Enhanced defect scanning