Inventor
VOLK ANDREW M
US61 patents
Patents
50 patentsUS6356105B1Mar 12, 2002
Impedance control system for a center tapped termination bus
INTEL CORP224 citations99
US5388265AFeb 7, 1995
Method and apparatus for placing an integrated circuit chip in a reduced power consumption state
INTEL CORP305 citations99
US6617888B2Sep 9, 2003
Low supply voltage differential signal driver
INTEL CORP106 citations98
US6457095B1Sep 24, 2002
Method and apparatus for synchronizing dynamic random access memory exiting from a low power state
INTEL CORP95 citations98
US6445316B1Sep 3, 2002
Universal impedance control for wide range loaded signals
INTEL CORP81 citations97
US6380758B1Apr 30, 2002
Impedance control for wide range loaded signals using distributed methodology
INTEL CORP104 citations97
US5615404AMar 25, 1997
System having independently addressable bus interfaces coupled to serially connected multi-ported signal distributors generating and maintaining frame based polling schedule favoring isochronous peripherals
INTEL CORP493 citations97
US6604179B2Aug 5, 2003
Reading a FIFO in dual clock domains
INTEL CORP72 citations96
US6570371B1May 27, 2003
Apparatus and method of mirroring a voltage to a different reference voltage point
INTEL CORP54 citations96
US6542013B1Apr 1, 2003
Fractional divisors for multiple-phase PLL systems
INTEL CORP61 citations96
US6408398B1Jun 18, 2002
Method and apparatus for detecting time domains on a communication channel
INTEL CORP61 citations96
US5537069AJul 16, 1996
Apparatus and method for selecting a tap range in a digital delay line
INTEL CORP71 citations96
US6495997B2Dec 17, 2002
High impedance current mode voltage scalable driver
INTEL CORP66 citations95
US6128749AOct 3, 2000
Cross-clock domain data transfer method and apparatus
INTEL CORP46 citations95
US7181631B2Feb 20, 2007
Mechanism to control an on die voltage regulator
INTEL CORP19 citations93
US6664906B2Dec 16, 2003
Apparatus for reduced glitch energy in digital-to-analog converter
INTEL CORP25 citations93
US6624662B1Sep 23, 2003
Buffer with compensating drive strength
INTEL CORP30 citations93
US6606705B1Aug 12, 2003
Method and apparatus for configuring an I/O buffer having an initialized default signaling level to operate at a sampled external circuit signaling level
INTEL CORP27 citations93
US6560666B1May 6, 2003
Hub link mechanism for impedance compensation update
INTEL CORP38 citations93
US6392573B1May 21, 2002
Method and apparatus for reduced glitch energy in digital-to-analog converter
INTEL CORP19 citations93
US6369734B2Apr 9, 2002
Method and apparatus for increasing linearity and reducing noise coupling in a digital to analog converter
INTEL CORP33 citations93
US6347850B1Feb 19, 2002
Programmable buffer circuit
INTEL CORP27 citations93
US6191662B1Feb 20, 2001
Self-start circuits for low-power clock oscillators
INTEL CORP32 citations93
US5384502AJan 24, 1995
Phase locked loop circuitry with split loop filter
INTEL CORP45 citations93
US4112490ASep 5, 1978
Data transfer control apparatus and method
INTEL CORP65 citations93
US7203853B2Apr 10, 2007
Apparatus and method for low latency power management on a serial data link
INTEL CORP31 citations92
US6693450B1Feb 17, 2004
Dynamic swing voltage adjustment
INTEL CORP24 citations92
US6420899B1Jul 16, 2002
Dynamic impedance matched driver for improved slew rate and glitch termination
INTEL CORP31 citations92
US6166563ADec 26, 2000
Method and apparatus for dual mode output buffer impedance compensation
INTEL CORP106 citations92
US5999020ADec 7, 1999
High-speed, differential pair input buffer
INTEL CORP28 citations92
US5621901AApr 15, 1997
Method and apparatus for serial bus elements of an hierarchical serial bus assembly to electrically represent data and control states to each other
INTEL CORP26 citations92
US4819081AApr 4, 1989
Phase comparator for extending capture range
INTEL CORP56 citations92
US6611918B1Aug 26, 2003
Method and apparatus for changing bias levels to reduce CMOS leakage of a real time clock when switching to a battery mode of operation
INTEL CORP18 citations91
US4829258AMay 9, 1989
Stabilized phase locked loop
INTEL CORP43 citations90
US7466174B2Dec 16, 2008
Fast lock scheme for phase locked loops and delay locked loops
INTEL CORP20 citations89
US5543734AAug 6, 1996
Voltage supply isolation buffer
INTEL CORP30 citations89
US5996027ANov 30, 1999
Transmitting specific command during initial configuration step for configuring disk drive controller
INTEL CORP48 citations87
US5369311ANov 29, 1994
Clock generator control circuit
INTEL CORP51 citations87
US6971040B2Nov 29, 2005
Method and system for reducing the effects of simultaneously switching outputs
INTEL CORP12 citations84
US6794919B1Sep 21, 2004
Devices and methods for automatically producing a clock signal that follows the master clock signal
INTEL CORP16 citations84
US6928494B1Aug 9, 2005
Method and apparatus for timing-dependant transfers using FIFOs
INTEL CORP17 citations83
US6915399B1Jul 5, 2005
Cross-clock domain data transfer method and apparatus
INTEL CORP14 citations83
US6774735B2Aug 10, 2004
Low power self-biasing oscillator circuit
INTEL CORP14 citations82
US6556022B2Apr 29, 2003
Method and apparatus for local parameter variation compensation
INTEL CORP16 citations80
US6777975B1Aug 17, 2004
Input-output bus interface to bridge different process technologies
INTEL CORP7 citations74
US6516396B1Feb 4, 2003
Means to extend tTR range of RDRAMS via the RDRAM memory controller
INTEL CORP12 citations74
US6507295B2Jan 14, 2003
Method to reduce glitch energy in digital-to-analog converter
INTEL CORP5 citations74
US6128359AOct 3, 2000
Phase difference magnifier
INTEL CORP9 citations74
US6112306AAug 29, 2000
Self-synchronizing method and apparatus for exiting dynamic random access memory from a low power state
INTEL CORP8 citations74
US5332930AJul 26, 1994
Phase locked loop circuitry with variable gain and bandwidth
INTEL CORP16 citations74
Showing the top 50 of 61 patents by PatentIndex Score.