Inventor

WANG JINN-SHYAN

TW37 patents

⚠️ This page may combine multiple inventors who share the name “WANG JINN-SHYAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WANG JINN-SHYAN

NAT UNIV CHUNG CHENG

Device for detecting and correcting timing error and method for designing typical-case timing using the same

Low power dynamic logic circuit

Low power programmable logic array assembly

Dynamic voltage scaling system having time borrowing and local boosting capability

Read and match circuit for low-voltage content addressable memory

Dual-ported and-type match-line circuit for content-addressable memories

Flip-flop implemented with metal-oxide semiconductors using a single low-voltage power supply and control method thereof

NOR-type ROM with hierarchical-BL structure, dynamic segmentation shielding, and source programming

Phase detector

UNIV NAT CHUNG CHENG

Variable-latency device to reduce sense error in multi-level multi-bit sensing scheme

Single-ended sense amplifier

Memory device for increasing write margin during write operation and reducing current leakage during standby operation and operation method thereof

Personalized voice conversion system

Low-voltage low-power memory device with read, write, hold, and standby assist voltages and operation method thereof

Static random access memory cell array, static random access memory cell and operating method thereof

Speculative lookahead processing device and method

IND TECH RES INST

HDTV decoder

High speed variable length decoder

Fast pipelined matrix multiplier

Leakage current control circuit with a single low voltage power supply and method thereof

Progressive scan system with field-offset sampling

WANG JINN-SHYAN

Clock de-skewing delay locked loop circuit

Segmented search line circuit device for content addressable memory

Tree-style AND-type match circuit device applied to content addressable memory

Tree-style and-type match circuit device applied to content addressable memory

Memory circuit properly workable under low working voltage

NAT SCIENCE COUNCIL REPUBLIC CHINA

Current-mode write-circuit of a static ram

ROM with four-phase dynamic circuits

GUO JIUN-IN

Intra prediction circuit device applied to the H.264 video coding standard

Method for reducing computational complexity of video compression standard

FARADAY TECH CORP

Time detection circuit and time detection method

On-chip apparatus and method for jitter measurement

WINBOND ELECTRONICS CORP

Computation speed compensation circuit and compensation method thereof

YANG SHU-YI

Integrated circuit module and manufacturing methods and application thereof

XU YING-JIE

Data processing method in embedded block coding with optimized truncation module

NAT CHUN CHENG UNIVERSITY

Design techniques and their circuit designs for versatile and scalable video coding

LIN ZHI-XIN

Method for processing digital image with discrete wavelet transform and apparatus for the same