Inventor

MARROW MARCUS

US124 patents

⚠️ This page may combine multiple inventors who share the name “MARROW MARCUS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARROW MARCUS

SEAGATE TECHNOLOGY LLC

Multi-signal realignment for changing sampling clock

Head delay calibration and tracking in MSMR systems

MISO equalization with ADC averaging

Regularized parameter adaptation

Multi-stage MISO circuit for fast adaptation

Preamble detection and frequency offset determination

Phase locking multiple clocks of different frequencies

Servo sector detection

Read channel buffer management for higher throughput decoding

Parallelized writing of servo RRO/ZAP fields

Timing excursion recovery

Sampling for multi-reader magnetic recording

Target parameter adaptation

Loop consistency using multiple channel estimates

Position error signal burst demodulation

Synchronous writing of patterned media

Data path dynamic range optimization

Dynamic timing recovery bandwidth modulation for phase offset mitigation

Head delay calibration and tracking in MSMR systems

Disc locked clock-based servo timing

Data path dynamic range optimization

Cancelling adjacent track interference

Preamble defect detection and mitigation

Iterative recovery from baseline or timing disturbances

SK HYNIX MEMORY SOLUTIONS INC

Memory efficient triggers of read disturb checks in solid state storage

Generating soft read values which optimize dynamic range

Generating soft read values which optimize dynamic range

Selective copy-back

BELLORADO JASON

Adjusting receiver parameters without known data

Generation of interpolated samples for decision based decoding

Inter-track interference cancelation for shingled magnetic recording

Write-precompensation and variable write backoff

LINK & MDASH A & MDASH MEDIA DEVICES CORP

Read channel processor

Preamble acquisition without second order timing loops

Decoupling magneto-resistive asymmetry and offset loops

SK HYNIX INC

Error detection using a logical address key

Miscorrection detection for error correcting codes using bit reliabilities

Decoding of turbo product codes using miscorrection detection

ST MICROELECTRONICS INC

Code word having data bits and code bits and method for encoding data

Parity- sensitive Viterbi detector and method for recovering information from a read signal

MARROW MARCUS

Blind and decision directed multi-level channel estimation

Coding architecture for multi-level NAND flash memory with stuck cells

UNIV CALIFORNIA

Method and system for near optimal iterative detection of the 2-dimensional ISI channel

Method and system for near optimal iterative detection of the 2-dimensional ISI channel

AGARWAL RAJIV

Measure of health for writing to locations in flash

Coding across data blocks to reduce write amplification in NAND flash

WU YINGQUAN

Error recovery for flash memory

WU ZHENG

Controlling preamble target amplitude

SILICON SYSTEMS RESEARCH LTD

Sequence error event detection and correction using fixed block digital sum codes

LEE FREDERICK K H

Soft input, soft ouput mappers and demappers for block codes