Inventor
GANDHI JASPREET SINGH
US26 patents
⚠️ This page may combine multiple inventors who share the name “GANDHI JASPREET SINGH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
25 patentsUS10770430B1Sep 8, 2020
Package integration for memory devices
XILINX INC53 citations97
US10529645B2Jan 7, 2020
Methods and apparatus for thermal interface material (TIM) bond line thickness (BLT) reduction and TIM adhesion enhancement for efficient thermal management
XILINX INC26 citations93
US11373989B1Jun 28, 2022
Package integration for laterally mounted IC dies with dissimilar solder interconnects
XILINX INC6 citations75
US11488936B2Nov 1, 2022
Stacked silicon package assembly having vertical thermal management
XILINX INC2 citations73
US11282775B1Mar 22, 2022
Chip package assembly with stress decoupled interconnect layer
XILINX INC2 citations73
US11195780B1Dec 7, 2021
Stacked silicon package assembly having thermal management using phase change material
XILINX INC4 citations73
US11145566B2Oct 12, 2021
Stacked silicon package assembly having thermal management
XILINX INC5 citations73
US10403591B2Sep 3, 2019
Chip package assembly with enhanced interconnects and method for fabricating the same
XILINX INC3 citations72
US10319606B1Jun 11, 2019
Chip package assembly with enhanced interconnects and method for fabricating the same
XILINX INC2 citations72
US10236229B2Mar 19, 2019
Stacked silicon package assembly having conformal lid
XILINX INC3 citations72
US11282776B2Mar 22, 2022
High density routing for heterogeneous package integration
XILINX INC2 citations68
US11355412B2Jun 7, 2022
Stacked silicon package assembly having thermal management
XILINX INC1 citations62
US11302674B2Apr 12, 2022
Modular stacked silicon package assembly
XILINX INC1 citations62
US11217550B2Jan 4, 2022
Chip package assembly with enhanced interconnects and method for fabricating the same
XILINX INC0 citations62
US11114360B1Sep 7, 2021
Multi-die device structures and methods
XILINX INC0 citations62
US11315858B1Apr 26, 2022
Chip package assembly with enhanced solder resist crack resistance
XILINX INC1 citations60
US11127643B1Sep 21, 2021
Test structures for validating package fabrication process
XILINX INC1 citations58
US12027493B2Jul 2, 2024
Fanout integration for stacked silicon package assembly
XILINX INC0 citations52
US11901300B2Feb 13, 2024
Universal interposer for a semiconductor package
XILINX INC0 citations52
US10971474B1Apr 6, 2021
Package integration for high bandwidth memory
XILINX INC0 citations51
US10930611B1Feb 23, 2021
Solder joints for board level reliability
XILINX INC0 citations51
US10527670B2Jan 7, 2020
Testing system for lid-less integrated circuit packages
XILINX INC0 citations51
US10096502B2Oct 9, 2018
Method and apparatus for assembling and testing a multi-integrated circuit package
XILINX INC0 citations51
US10879157B2Dec 29, 2020
High density substrate and stacked silicon package assembly having the same
XILINX INC0 citations41
US10593638B2Mar 17, 2020
Methods of interconnect for high density 2.5D and 3D integration
XILINX INC0 citations41